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VLSI Design
Volume 4, Issue 1, Pages 41-51
http://dx.doi.org/10.1155/1996/86362

An Efficient Algorithm for the Split K-Layer Circular Topological Via Minimization Problem

1Advanced Technology Center, Computer & Communication Research Laboratories, Industrial Technology Research Institute, E000, Bldg. 11, 195 Sec. 4, Chung Hsing Rd, Chutung, Hsinchu 31015, Taiwan
2Institute of Computer Science, National Tsing-Hua University, Hsinchu, Taiwan

Received 18 September 1992; Revised 13 December 1993

Copyright © 1996 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

J. S. Huang and Y. H. Chin, “An Efficient Algorithm for the Split K-Layer Circular Topological Via Minimization Problem,” VLSI Design, vol. 4, no. 1, pp. 41-51, 1996. https://doi.org/10.1155/1996/86362.