VLSI Design

VLSI Design / 1998 / Article
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High Performance Design Automation of VLSI Interconnects

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Volume 7 |Article ID 026574 | https://doi.org/10.1155/1998/26574

Gustavo E. Téllez, Majid Sarrafzadeh, "On Rectilinear Distance-Preserving Trees", VLSI Design, vol. 7, Article ID 026574, 16 pages, 1998. https://doi.org/10.1155/1998/26574

On Rectilinear Distance-Preserving Trees

Abstract

Given a set of terminals on the plane N={s,ν1,,νn}, with a source terminal s, a Rectilinear Distance-Preserving Tree (RDPT) T(V, E) is defined as a tree rooted at s, connecting all terminals in N. An RDPT has the property that the length of every source to sink path is equal to the rectilinear distance between that source and sink. A Min- Cost Rectilinear Distance-Preserving Tree (MRDPT) minimizes the total wire length while maintaining minimal source to sink linear delay, making it suitable for high performance interconnect applications.This paper studies problems in the construction of RDPTs, including the following contributions. A new exact algorithm for a restricted version of the problem in one quadrant with O(n2) time complexity is proposed. A novel heuristic algorithm, which uses optimally solvable sub-problems, is proposed for the problem in a single quadrant. The average and worst-case time complexity for the proposed heuristic algorithm are O(n3/2) and O(n3), respectively. A 2-approximation of the quadrant merging problem is proposed. The proposed algorithm has time complexity O(α2T(n)+α3) for any constant α > 1, where T(n) is the time complexity of the solution of the RDPT problem on one quadrant. This result improves over the best previous quadrant merging solution which has O(n2T(n)+n3) time complexity.We test our algorithms on randomly uniform point sets and compare our heuristic RDPT construction against a Minimum Cost Rectilinear Steiner (MRST) tree approximation algorithm. Our results show that RDPTs are competitive with Steiner trees in total wire-length when the number of terminals is less than 32. This result makes RDPTs suitable for VLSI routing applications. We also compare our algorithm to the Rao-Shor RDPT approximation algorithm obtaining improvements of up to 10% in total wirelength. These comparisons show that the algorithms proposed herein produce promising results.

Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


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