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VLSI Design
Volume 7, Issue 2, Pages 131-141
http://dx.doi.org/10.1155/1998/32654

SCOAP-based Testability Analysis from Hierarchical Netlists

1Department of Electrical Engineering, Indian Institute of Technology, New Delhi 110016, India
2Synopsys, Inc., Milipitas, CA, USA

Received 27 July 1995

Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

C. P. Ravikumar and H. Joshi, “SCOAP-based Testability Analysis from Hierarchical Netlists,” VLSI Design, vol. 7, no. 2, pp. 131-141, 1998. https://doi.org/10.1155/1998/32654.