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VLSI Design
Volume 9, Issue 3, Pages 253-270
http://dx.doi.org/10.1155/1999/18373

Concurrency Preserving Partitioning Algorithm for Parallel Logic Simulation

Department of Computer Science and Engineering, Wright State University, Dayton, Ohio 45435, USA

Received 26 May 1998

Copyright © 1999 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Hong K. Kim and Jack Jean, “Concurrency Preserving Partitioning Algorithm for Parallel Logic Simulation,” VLSI Design, vol. 9, no. 3, pp. 253-270, 1999. https://doi.org/10.1155/1999/18373.