Abstract
String matching (SM) problem is to find the occurrences of a pattern within a text. A
vanable length don't care (VLDC) is a special symbol, not belonging to a finite alphabet
∑ but in ∑*. Each VLDC in the pattern can match any substring in the text. Given a
run-length coded text of length 2n over ∑ and a run-length coded pattern of length 2m
over ∑*, this paper first presents an O(1) time parallel SM algorithm for run-length
coded strings with VLDCs on a reconfigurable mesh (RM) using O(nm) processors.
Consider the hardware limitation in VLSI implementation. In order to be suitable for
VLSI modular implementation, a partitionable parallel algorithm on the RM with
limited processors is further presented. For N < n and M < m, the SM for run-length
coded strings with VLDCs can be solved in O