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VLSI Design
Volume 11, Issue 2, Pages 149-159

Configurable 2-D Linear Feedback Shift Registers for VLSI Built-in Self-test Designs

Department of Electrical Engineering, Wright State University, Dayton 45435, OH, USA

Received 20 May 1999; Accepted 13 October 1999

Copyright © 2000 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Recently a multiple-sequence test generator was presented based on two-dimensional linear feedback shift registers (2-D LFSR). This generator can generate a set of precomputed test vectors obtained by an ATPG tool for detecting random-pattern-resistant faults and particular hard-to-detect faults. In addition, it can generate better random patterns than a conventional LFSR. In this paper we describe an optimized BIST scheme which has a configurable 2-D LFSR structure. Starting from a set of stuck-at faults and a corresponding set of test vectors detecting these faults, the corresponding test pattern generator is determined automatically. A synthesis procedure of designing this test generator is presented. Experimental results show that the hardware overhead is considerably reduced compared with 2-D LFSR generators.