Table of Contents
VLSI Design
Volume 11, Issue 4, Pages 331-338

Design and Analysis of Radix-8/4/2 64b/32b Integer Divider Using COMPASS Cell Library

Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung 80424, Taiwan

Received 5 June 1999; Accepted 24 September 1999

Copyright © 2000 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


A high speed 64b/32b integer divider employing digit-recurrence division method and the on-the-fly conversion algorithm, wherein a fast normalizer is included, which is used as the pre-processor of the proposed integer divider. For the sake of enhancing throughput rate, the proposed divider uses a mixed radix-8/4/2 division instead of the traditional radix-2 division. On-the-fly remainder adjustment is also realized in the converter module of the divider. The entire design is written in Verilog HDL (hardware description language) employing COMPASS 0.6 μm 1P3M cell library (V3.0), and then synthesized by SYNOPSYS. The simulation results indicate that our design is a better option than the existing long divider designs.