Table of Contents
VLSI Design
Volume 12, Issue 3, Pages 407-414

A Low-Voltage Floating-Gate MOS Biquad

Instituto de Microelectrónica de Sevilla (IMSE), Centro Nacional de Microelectrónica (CNM), Edificio CICA, Avda. Reina Mercedes s/n, Sevilla 41012, Spain

Received 20 June 2000; Revised 3 August 2000

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Esther O. Rodríguez-Villegas, Alberto Yúfera, and Adoración Rueda, “A Low-Voltage Floating-Gate MOS Biquad,” VLSI Design, vol. 12, no. 3, pp. 407-414, 2001.