VLSI Design

VLSI Design / 2001 / Article
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Computional Electronics; Papers Presented at The Seventh International Workshop on Computional Electronics

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Volume 13 |Article ID 062583 | https://doi.org/10.1155/2001/62583

G. Iannaccone, S. Gennai, "Program, Erase and Retention Times of Thin-oxide Flash-EEPROMs", VLSI Design, vol. 13, Article ID 062583, 4 pages, 2001. https://doi.org/10.1155/2001/62583

Program, Erase and Retention Times of Thin-oxide Flash-EEPROMs

Abstract

We present an investigation of the process of charging and discharging of the floating gate of thin oxide Flash EEPROMs based on a fully quantum mechanical approach to transport in the vertical direction. Our approach allows us to compute program, erase, and retention times as a function of the gate stack structure, and applied voltages.

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


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