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VLSI Design
Volume 12 (2001), Issue 2, Pages 221-231
http://dx.doi.org/10.1155/2001/78456

Backward Propagated Capacitance Model for Register Transfer Level Power Estimation

1Department of Electronic and Electrical Engineering, Pohang University of Science and Technology, Pohang, Kyungbuk 790-784, South Korea
2School of Electrical and Electronics Engineering, Chungbuk National University, Chungbuk, 361-763, South Korea

Received 20 June 2000; Revised 3 August 2000

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Jung Yun Choi, Young Hwan Kim, and Kyoung-Rok Cho, “Backward Propagated Capacitance Model for Register Transfer Level Power Estimation,” VLSI Design, vol. 12, no. 2, pp. 221-231, 2001. doi:10.1155/2001/78456