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VLSI Design
Volume 12, Issue 2, Pages 245-273
http://dx.doi.org/10.1155/2001/82129

An Instruction-Level Power Analysis Model with Data Dependency

1Dipartimento di Ingegneria Informatica e delle Telecomunicazioni, Università di Catania, V.le. A. Doria, Catania 6–95125, Italy
2STMicroelectronics, Stradale Primosole, Catania 95100, Italy

Received 20 June 2000; Revised 3 August 2000

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, and Davide Sarta, “An Instruction-Level Power Analysis Model with Data Dependency,” VLSI Design, vol. 12, no. 2, pp. 245-273, 2001. https://doi.org/10.1155/2001/82129.