Abstract

The inner product of two vectors might be one of the most frequently used mathematical operations in digital computation. The design style of inner product processor will become a critical issue of performance. So does its basic building block, i.e. 3-2 compressor. In this work, improved designs of 3-2 C2PL-based compressors are presented which can be used to build a fast inner product processor. The features of our compressors include a short delay minimized by HSPICE optimization, less transistor count, and high fan-out.