Table of Contents Author Guidelines Submit a Manuscript
VLSI Design
Volume 2008 (2008), Article ID 680157, 8 pages
http://dx.doi.org/10.1155/2008/680157
Research Article

A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated Sequences

Department of Informatics, Technological Educational Institute of Athens, Athens 12210, Greece

Received 27 March 2007; Accepted 5 December 2007

Academic Editor: Bashir M. Al-Hashimi

Copyright © 2008 Ioannis Voyiatzis. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [1 citation]

The following is the list of published articles that have cited the current article.

  • Dimitrios Magos, Ioannis Voyiatzis, and Steffen Tarnick, “An accumulatorbased test-per-clock scheme,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 19, no. 6, pp. 1090–1094, 2011. View at Publisher ยท View at Google Scholar