VLSI Design

VLSI Design / 2008 / Article / Fig 2

Research Article

Integrated VCOs for Medical Implant Transceivers

Figure 2

PLL architecture, (a) block diagram for the PLL with calibration, (b) down conversion of the adjacent channel by the phase noise.
912536.fig.002a
(a)
912536.fig.002b
(b)

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