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VLSI Design
Volume 2009 (2009), Article ID 283702, 14 pages
http://dx.doi.org/10.1155/2009/283702
Review Article

Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications

Semiconductor Devices and VLSI Technology (SDVT) Group, Department of Electronics & Computer Engineering (E & CE), Indian Insititue of Technology (IIT), Roorkee, Roorkee-247667, Uttarakhand, India

Received 13 August 2008; Revised 21 November 2008; Accepted 21 January 2009

Academic Editor: Mohamed Masmoudi

Copyright © 2009 Ramesh Vaddi et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [13 citations]

The following is the list of published articles that have cited the current article.

  • R.D. Jorgenson, L. Sorensen, D. Leet, M.S. Hagedorn, D.R. Lamb, T.H. Friddell, and W.P. Snapp, “Ultralow-Power Operation in Subthreshold Regimes Applying Clockless Logic,” Proceedings of the IEEE, vol. 98, no. 2, pp. 299–314, 2010. View at Publisher · View at Google Scholar
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