VLSI Design

VLSI Design / 2009 / Article / Tab 1

Research Article

Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management

Table 1

Synthesis results of the routers on a Virtex2 FPGA device (flit size:  bits, FIFO buffer depth: 8).

Routing Al.XYWFELOENF

Number of slices48845009501650175114
Max. freq. (MHz)83.3991.0289.4388.57100.51

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