VLSI Design

VLSI Design / 2009 / Article / Tab 5

Research Article

Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management

Table 5

Power estimation at 200 MHz with UMC 180-nm technology (1.8 V). (Flit size: 32 + 6 bits, FIFO depth: 4.)

Routing Alg.:XYWFNF

Net switching power ( )7.497.948.04
Cell internal power ( )63.9860.8766.43
Cell leakage power ( )0.890.990.84

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