VLSI Design

VLSI Design / 2010 / Article / Tab 1

Research Article

Evolvable Block-Based Neural Network Design for Applications in Dynamic Environments

Table 1

Peak and relative computational capacities and capacity per mW of commercial embedded processors. Relative values are normalized to PPC405 numbers.

ProcessorOrganizationCycle freqPowerMOPSRelative MOPSMOPS/mWRelative MOPS/mW

MIPS 24Kc1×32261 MHz363 mW870.650.240.14
MIPS 4KE1×32233 MHz58 mW780.591.330.76
ARM 1026EJ-S1×32266 MHz279 mW890.670.320.18
ARM 11MP1×32320 MHz74 mW1070.801.450.83
ARM 720T1×32100 MHz20 mW330.251.670.95
PPC 4051×32400 MHz76 mW1331.001.751.00
PPC 4401×32533 MHz800 mW1781.340.220.13
PPC 750FX2×32533 MHz6.75 W3552.670.050.03
PPC 970FX2×641 GHz11 W6675.020.060.03

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