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VLSI Design
Volume 2010 (2010), Article ID 639747, 7 pages
Research Article

An Approach for Implementing State Machines with Online Testability

1Department of Electrical Engineering, Texas A&M University, Texarkana, TX 75505, USA
2Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, AR 72701, USA

Received 3 June 2009; Revised 24 December 2009; Accepted 9 February 2010

Academic Editor: Rubin Parekhji

Copyright © 2010 P. K. Lala et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


During the last two decades, significant amount of research has been performed to simplify the detection of transient or soft errors in VLSI-based digital systems. This paper proposes an approach for implementing state machines that uses 2-hot code for state encoding. State machines designed using this approach allow online detection of soft errors in registers and output logic. The 2-hot code considerably reduces the number of required flip-flops and leads to relatively straightforward implementation of next state and output logic. A new way of designing output logic for online fault detection has also been presented.