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VLSI Design
Volume 2010, Article ID 706548, 8 pages
http://dx.doi.org/10.1155/2010/706548
Research Article

Linearity Analysis on a Series-Split Capacitor Array for High-Speed SAR ADCs

1Analog and Mixed Signal VLSI Laboratory, Faculty of Science and Technology, University of Macau, Macao, China
2Instituto Superior Técnico, TU of Lisbon, 1049-001 Lisbon, Portugal

Received 31 May 2009; Accepted 8 December 2009

Academic Editor: Benjamin J. Blalock

Copyright © 2010 Yan Zhu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Linked References

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