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VLSI Design
Volume 2011 (2011), Article ID 398390, 2 pages

CAD for Gigascale SoC Design and Verification Solutions

1Department of Electrical and Computer Engineering, Michigan Technological University, Houghton, MI 49931, USA
2IBM Austin Research Laboratory, 11501 Burnet Road, MS 904-6G016, Austin, TX 78758-3493, USA
3Institute of Microelectronics, Tsinghua University, Beijing 100084, China

Received 5 December 2011; Accepted 5 December 2011

Copyright © 2011 Shiyan Hu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


This article has no abstract.