Table of Contents
VLSI Design
Volume 2011, Article ID 530851, 10 pages
http://dx.doi.org/10.1155/2011/530851
Research Article

Buffer Planning for IP Placement Using Sliced-LFF

1Tsinghua National Laboratory for Information Science & Technology, Tsinghua University, Beijing 100084, China
2Information, Production and Systems (IPS), Waseda University, Kitakyushu-shi 808-0135, Japan

Received 14 November 2010; Accepted 11 December 2010

Academic Editor: Shiyan Hu

Copyright © 2011 Ou He et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Ou He, Sheqin Dong, Jinian Bian, and Satoshi Goto, “Buffer Planning for IP Placement Using Sliced-LFF,” VLSI Design, vol. 2011, Article ID 530851, 10 pages, 2011. https://doi.org/10.1155/2011/530851.