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VLSI Design
Volume 2011, Article ID 731957, 10 pages
http://dx.doi.org/10.1155/2011/731957
Review Article

SoC: A Real Platform for IP Reuse, IP Infringement, and IP Protection

Advanced Computing and Microelectronics Unit, Indian Statistical Institute, Kolkata 700108, India

Received 12 October 2010; Revised 4 January 2011; Accepted 24 January 2011

Academic Editor: Shiyan Hu

Copyright © 2011 Debasri Saha and Susmita Sur-Kolay. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [8 citations]

The following is the list of published articles that have cited the current article.

  • Qiang Liu, Haie Li, Qiang Liu, and Haie Li, “Hardware Design Space Exploration with a New Dimension -- IP Protection Robustness,” 2015 Euromicro Conference on Digital System Design, pp. 599–605, . View at Publisher · View at Google Scholar
  • Qiang Liu, and Haie Li, “A hierarchical IP protection approach for hard IP cores,” 2015 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1566–1569, . View at Publisher · View at Google Scholar
  • Oscar Montiel-Ross, Jorge Quiñones, and Roberto Sepúlveda, “Designing High-Performance Fuzzy Controllers Combining IP Cores and Soft Processors,” Advances in Fuzzy Systems, vol. 2012, pp. 1–11, 2012. View at Publisher · View at Google Scholar
  • Laavanya Sridhar, and Lakshmi Prabha, “RFID based access control protection scheme for SRAM FPGA IP cores,” Microprocessors and Microsystems, vol. 37, no. 6-7, pp. 629–640, 2013. View at Publisher · View at Google Scholar
  • Susmita Sur-Kolay, and Debasri Saha, “Trusted sharing of intellectual property in electronic hardware design,” Proceedings of the 9th Workshop on Embedded Systems Security, WESS 2014, 2014. View at Publisher · View at Google Scholar
  • Fulong Chen, Yunxiang Sun, Chuanxin Zhao, Jie Yang, Heping Ye, Junru Zhu, and Qimei Tang, “Elastic pipeline design of high performance micro-controller YL8MCU for signal processing of digital home appliances,” Open Automation and Control Systems Journal, vol. 7, no. 1, pp. 863–872, 2015. View at Publisher · View at Google Scholar
  • Sung-Gun Song, Seong-Mo Park, Jeong-Gun Lee, and Myeong-Hoon Oh, “Low Latency Synchronization Scheme Using Prediction and Avoidance of Synchronization Failure in Heterochronous Clock Domains,” Journal Of Semiconductor Technology And Science, vol. 15, no. 2, pp. 208–222, 2015. View at Publisher · View at Google Scholar
  • Qiang Liu, Wenqing Ji, Qi Chen, and Terrence Mak, “IP Protection of Mesh NoCs Using Square Spiral Routing,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 1–1, 2015. View at Publisher · View at Google Scholar