Weighted Transition Based Reordering, Columnwise Bit Filling, and Difference Vector: A Power-Aware Test Data Compression Method

Table 3

Comparison of % compression for various test data processing methods.

ISCAS circuit	Minimum transition fill	0 Filling + XOR [30]	Run based bit fill maximum limit	HDR-CBF-DV	2-D Reordering	WTR-CBF-DV
s5378	−12.31	48.02	52.36	62.33	59.66	62.15
s9234	−20.67	43.59	47.80	61.06	61.35	63.31
s13207	6.16	81.30	83.65	87.47	88.22	88.04
s15850	−17.91	66.22	68.18	72.84	73.96	73.38
s38417	−20.39	43.26	54.5	66.18	65.13	66.38
s38584	−8.90	60.91	62.49	64.79	66.08	65.21