VLSI Design

VLSI Design / 2012 / Article / Fig 14

Research Article

Performance Analysis of High Speed Hybrid CMOS Full Adder Circuits for Low Voltage VLSI Design

Figure 14

(a) Majority-function-based full adder (MajFA2). (b) Inverter-based Majority full adder (MajFA3).
173079.fig.0014a
(a)
173079.fig.0014b
(b)

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