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Special Issues
VLSI Design
/
2012
/
Article
/
Tab 5
/
Research Article
Performance Analysis of High Speed Hybrid CMOS Full Adder Circuits for Low Voltage VLSI Design
Table 5
Simulation layout comparisons of Majority function logic.
μ
m
Bridge Majority function
MOSCAP Majority function
Layout
Length (
μ
m)
Width (
μ
m)
Area (
μ
m
2
)
Length (
μ
m)
Width (
μ
m)
Area (
μ
m
2
)
Dimen.
8.8
6.9
60.7
9.9
2.95
29.2
