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VLSI Design
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2012
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Article
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Fig 9
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Research Article
Modeling and Design of a Nano Scale CMOS Inverter for Symmetric Switching Characteristics
Figure 9
Correlation diagram for the various outputs of the 1st ANN.
(a)
Rise time
(b)
Fall time
(c)
Low-to-high propagation delay
(d)
High-to-low propagation delay