Test Generation for Crosstalk-Induced Delay Faults in VLSI Circuits Using Modified FAN Algorithm

Table 7

Comparison with previous works.

Circuit name	Previous work [8]		Previous work [9]		Previous work [18]		Proposed ATPG
	% Fault coverage	Time(s)	% Fault coverage	Time(s)	% Fault coverage	Time(s)	% Fault coverage	Time(s)
s208	31.50	0.18	55.48	0.2	—	—	69	1.233
s298	42.66	0.17	—	—	—	—	84	3.317
s386	34.43	0.55	51.89	0.3	—	—	62	15.26
s526	66.30	0.19	55.24	0.2	—	—	86	12.033
s420.1	27.19	0.50	—	—	—	—	22	9.3
s1196	31.32	0.67	1.03	0.4	8.41	19	62	1404
s1238	—	—	3.83	0.2	3.11	16	87	704.5
s13207.1	87.14	14329	25.13	18287	—	—	64	32333.5
s15850.1	83.05	19627	3.15	83371	—	—	53	97136.4