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VLSI Design
Volume 2012 (2012), Article ID 809393, 13 pages
Research Article

A ±6 ms-Accuracy, 0.68 mm2, and 2.21 μW QRS Detection ASIC

Department of Electrical Engineering, National Chiao Tung University, Room 720, Engineering Building 5, 1001 University Road, Hsinchu 30010, Taiwan

Received 7 April 2012; Revised 1 October 2012; Accepted 14 October 2012

Academic Editor: Ray C. C. Cheung

Copyright © 2012 Sheng-Chieh Huang et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [3 citations]

The following is the list of published articles that have cited the current article.

  • D. Chitra, and T. Manigandan, “Low Power Adder Based Digital Filter for QRS Detector,” Scientific World Journal, 2014. View at Publisher · View at Google Scholar
  • S. Karthick, S. Valarmathy, and E. Prabhu, “Low Power Systolic Array Based Digital Filter for DSP Applications,” The Scientific World Journal, vol. 2015, pp. 1–6, 2015. View at Publisher · View at Google Scholar
  • Mukesh Agrawal, Krishnendu Chakrabarty, and Bill Eklow, “A Distributed, Reconfigurable, and Reusable BIST Infrastructure for Test and Diagnosis of 3-D-Stacked ICs,” Ieee Transactions On Computer-Aided Design Of Integrated Circuits And Systems, vol. 35, no. 2, pp. 309–322, 2016. View at Publisher · View at Google Scholar