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VLSI Design
Volume 2012 (2012), Article ID 849120, 10 pages
Research Article

Digital Noise Generator Design Using Inverted 1D Tent Chaotic Map

1Instituto Politécnico Nacional, ESIME-Culhuacan, Santa Ana 1000, 04430 Mexico, DF, Mexico
2Centro de Física Aplicada y Tecnología Avanzada, UNAM, Boulevard Juriquilla 3001, Juriquilla 76230, Querétaro, Mexico

Received 19 November 2011; Accepted 30 August 2012

Academic Editor: Wieslaw Kuzmicz

Copyright © 2012 Leonardo Palacios-Luengas et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Linked References

  1. C. E. Rojas-Lopez, Block cipher using the one-dimensional Tent chaotic map [M.S. dissertation], IPN, Querétaro, Mexico, 2011.
  2. A. Qi, C. Han, and G. Wang, “Design and FPGA realization of a pseudo random sequence generator based on a switched chaos,” in Proceedings of the International Conference on Communications, Circuits and Systems (ICCCAS '10), pp. 417–420, July 2010. View at Publisher · View at Google Scholar · View at Scopus
  3. P. Dabal and R. Pelka, “A chaos-based pseudo-random bit generator implemented in FPGA device,” in Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS '11), pp. 151–154, April 2011. View at Publisher · View at Google Scholar · View at Scopus
  4. A. Pande and J. Zambreno, “Design and hardware implementation of a chaotic encryption scheme for real-time embedded systems,” in Proceedings of the International Conference on Signal Processing and Communications (SPCOM '10), pp. 1–5, July 2010. View at Publisher · View at Google Scholar · View at Scopus
  5. S. Callegari, G. Setti, and P. J. Langlois, “CMOS tailed tent map for the generation of uniformly distributed chaotic sequences,” in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS '97), pp. 781–784, Hong Kong, Hong Kong, June 1997. View at Scopus
  6. H. Nejati, A. Beirami, and Y. Massoud, “A realizable modified tent map for true random number generation,” in Proceedings of the IEEE 51st International Midwest Symposium on Circuits and Systems (MWSCAS '08), pp. 621–624, August 2008. View at Publisher · View at Google Scholar · View at Scopus
  7. Institute of Electrical and Electronics Engineers, IEEE754 Stardard for Binary Floating-Point Arithmetic, 1984.
  8. D. Luengo-Garcia, Estimación óptima de secuencias caóticas con aplicación de comunicaciones [Ph.D. dissertation], Universidad de Cantabria, Santander, Spain, 2006.
  9. R. C. Hilborn, Chaos and Nonlinear Dynamics: An Introduction for Scientists and Engineers, Oxford University Press, 2nd edition, 2000.
  10. J. A. Martínez-Ñonthe, L. Palacios-Luengas, M. Cruz Irisson, J. A. Diaz-Mendez, and R. Vázquez-Medina, “Digital Noise Generator using one-dimensional chaotic maps,” in Proceedings of the 7th International Conference on Low Dimensional Structures and Devices, AIP Conference Proceedings, 2012.
  11. J. A. Martínez-Ñonthe, J. A. Díaz-Méndez, M. Cruz-Irisson, L. Palacios-Luengas, J. L. Del-Río-Correa, and R. Vázquez-Medina, “Cryptosystem with one dimensional chaotic maps,” in Computational Intelligence in Security for Information Systems, vol. 6694 of Lecture Notes in Computer Science, pp. 191–198, Springer, Berlin, Germany, 2011. View at Google Scholar
  12. Digital Core Design, Alliance Core Data Sheets for Floating-Point Arithmetic, 2001,
  13. Xilinx, Spartan-3E FPGA Family: Data Sheet, 2011,