VLSI Design

VLSI Design / 2012 / Article / Tab 3

Research Article

Power Consumption Models for Decimation FIR Filters in Multistandard Receivers

Table 3

Specification of the filters in proposed architectures for the GSM standard.

Architecture SpecificationCIC filterHB1filterHB2 filterFIR filter

2 stages
 Input wordlength6N/AN/A17
 Coefficients wordlengthN/AN/AN/A12
 Decimation factor12N/AN/A4

3 stages
 Input word-length617N/A17
 Coefficients wordlengthN/A11N/A11
 Decimation factor122N/A2

4 stages
 Input wordlength6171717
 Coefficients wordlengthN/A101110
 Decimation factor6222