Adaptivity Support for MPSoCs Based on Process Migration in Polyhedral Process Networks

<table>Example of a PPN (a) and structure of process <svg height="11.175" id="M24" style="vertical-align:-0.0pt" version="1.1" viewbox="0 0 19.1 11.175" width="19.1" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,11.113)"><path d="M619 482q0 -69 -40.5 -119t-96 -72.5t-118.5 -26.5h-44l-70 20l-31 -151q-14 -67 0.5 -83t89.5 -22l-5 -28h-287l8 28q65 7 81.5 22t29.5 83l79 398q12 56 0.5 70.5t-78.5 20.5l7 28h255q108 0 164 -43t56 -125zM524 478q0 141 -146 141q-25 0 -47 -8q-16 -6 -20.5 -13.5
t-10.5 -39.5l-43 -241q37 -13 83 -13q67 0 125.5 45t58.5 129z" id="x1D443"></path></g><g transform="matrix(.017,-0,0,-.017,10.874,11.113)"><path d="M412 140l28 -9q0 -2 -35 -131h-373v23q112 112 161 170q59 70 92 127t33 115q0 63 -31 98t-86 35q-75 0 -137 -93l-22 20l57 81q55 59 135 59q69 0 118.5 -46.5t49.5 -122.5q0 -62 -29.5 -114t-102.5 -130l-141 -149h186q42 0 58.5 10.5t38.5 56.5z" id="x32"></path></g>
</svg> (b).</table>

VLSI Design

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Figure 3

Figure 3: Adaptivity Support for MPSoCs Based on Process Migration in Polyhedral Process Networks 