Research Article
Low-Power Adiabatic Computing with Improved Quasistatic Energy Recovery Logic
Table 1
Comparison of power, delay, and PDP of 8-inverter chain in 10 cycles of charging and discharging.
| Power dissipation (μW) | Frequency (MHz) | 0.01 | 0.1 | 1 | 10 | 20 | 33.3 | 50 | CMOS | 0.09 | 0.12 | 0.40 | 3.32 | 6.6 | 10.9 | 16.4 | QSERL | 0.02 | 0.10 | 0.66 | 3.69 | 6.2 | 8.95 | 11.7 | IQSERL | 0.01 | 0.02 | 0.13 | 1.92 | 4.8 | 8.92 | 15.2 |
| Delay (ns) | CMOS | 55.4 | 3.15 | 1.37 | 1.52 | 1.5 | 1.48 | 1.47 | QSERL | 4210 | 522 | 64.4 | 9.38 | 5.69 | 4.10 | 3.29 | IQSERL | 1.92 | 6.24 | 4.53 | 2.56 | 2.07 | 1.8 | 1.68 |
| PDP (fJ) | CMOS | 4.99 | 0.38 | 0.55 | 5.05 | 9.9 | 16.1 | 24.1 | QSERL | 84.2 | 52.2 | 42.5 | 34.6 | 35.3 | 36.7 | 38.5 | IQSERL | 0.02 | 0.12 | 0.59 | 4.92 | 9.94 | 16.0 | 25.5 |
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