Table of Contents
VLSI Design
Volume 2013, Article ID 936181, 16 pages
Research Article

Framework for Simulation of Heterogeneous MpSoC for Design Space Exploration

Department of Electrical and Computer Engineering, University of Nevada Las Vegas, 4505 Maryland Pkwy, Las Vegas, NV 89154, USA

Received 8 October 2012; Revised 29 January 2013; Accepted 14 April 2013

Academic Editor: Paul Bogdan

Copyright © 2013 Bisrat Tafesse and Venkatesan Muthukumar. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [3 citations]

The following is the list of published articles that have cited the current article.

  • Dihia Belkacemi, Youcef Bouchebaba, Mehammed Daoui, and Mustapha Lalam, “Network on Chip and Parallel Computing in Embedded Systems,” 2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC), pp. 146–152, . View at Publisher · View at Google Scholar
  • Jongsu Park, Heejun Yun, and Sangook Moon, “Enhancing MPI performance using atomic pipelined message broadcast in a distributed memory MPSoC,” IEICE Electronics Express, vol. 11, no. 13, pp. 20140357–20140357, 2014. View at Publisher · View at Google Scholar
  • Jeevan Sirkunan, Chia Yee Ooi, N. Shaikh-Husin, Yuan Wen Hau, and M.N. Marsono, “Hardware Transactional Memory Architecture with Adaptive Version Management for Multi-Processor FPGA Platforms,” Journal of Systems Architecture, 2016. View at Publisher · View at Google Scholar