Radix-2<sup><i>α</i></sup>/4<sup><i>β</i></sup> Building Blocks for Efficient VLSI’s Higher Radices Butterflies Implementation

<table>(a) Proposed multiplexed radix-2<sup>2</sup> (MuxMDC-R2<sup>2</sup>) BPE and (b) block circuit diagram of the radix-2 adder network [<a href="/journals/vlsi/2014/690594/#B22">7</a>].</table>

VLSI Design

fig2

Figure 2

Figure 2: Radix-2<sup><i>α</i></sup>/4<sup><i>β</i></sup> Building Blocks for Efficient VLSI’s Higher Radices Butterflies Implementation 

VLSI Design

Radix-2α/4β Building Blocks for Efficient VLSI’s Higher Radices Butterflies Implementation

Figure 2

Radix-2^α/4^β Building Blocks for Efficient VLSI’s Higher Radices Butterflies Implementation