The Design of Low Noise Amplifiers in Deep Submicron CMOS Processes: A Convex Optimization Approach

<div>Circuit model for the gate noise [<a href="/journals/vlsi/2015/312639/#B1">1</a>, <a href="/journals/vlsi/2015/312639/#B8">8</a>].</div>

VLSI Design

Figure 4: The Design of Low Noise Amplifiers in Deep Submicron CMOS Processes: A Convex Optimization Approach 