Improved Switching Energy Reduction Approach in Low-Power SAR ADC for Bioelectronics

<div>The simulation results of a 10-bit ADC with this proposed switching scheme (a) without parasitic capacitance and (b) with parasitic capacitance.</div>

VLSI Design

fig6

Figure 6

Figure 6: Improved Switching Energy Reduction Approach in Low-Power SAR ADC for Bioelectronics 