VLSI Design

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Research Article

State-Transition-Aware Spilling Heuristic for MLC STT-RAM-Based Registers

Algorithm 1

The procedure of building spilling cost model.
The write numbers for each state are first collected;
The frequency of every state transition can be calculated by Equation (2);
The spilling cost of every node (variable) can be obtained based on frequency analysis;
The node is sorted based on write cost in descending order;
The highest cost node is selected for spilling;

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