Table of Contents
VLSI Design
Volume 2017, Article ID 1030249, 9 pages
https://doi.org/10.1155/2017/1030249
Research Article

State-Transition-Aware Spilling Heuristic for MLC STT-RAM-Based Registers

1College of Information Engineering, Capital Normal University, Beijing 100048, China
2Department of Electrical and Computer Engineering, University of Delaware, Newark, DE, USA
3Beijing Advanced Innovation Center for Imaging Technology, Beijing, China

Correspondence should be addressed to Keni Qiu; nc.ude.unc@nkuiq

Received 6 June 2017; Accepted 22 October 2017; Published 22 November 2017

Academic Editor: Chien-In Henry Chen

Copyright © 2017 Yuanhui Ni et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Yuanhui Ni, Zhiyao Gong, Weiwen Chen, Chengmo Yang, and Keni Qiu, “State-Transition-Aware Spilling Heuristic for MLC STT-RAM-Based Registers,” VLSI Design, vol. 2017, Article ID 1030249, 9 pages, 2017. https://doi.org/10.1155/2017/1030249.