VLSI Design

Volume 2018, Article ID 6153274, 13 pages

https://doi.org/10.1155/2018/6153274

## First Steps in Creating Online Testable Reversible Sequential Circuits

Correspondence should be addressed to Jacqueline E. Rice; ac.htelu@ecir.j

Received 2 May 2017; Accepted 6 December 2017; Published 14 January 2018

Academic Editor: Marcelo Lubaszewski

Copyright © 2018 Mozammel H. A. Khan and Jacqueline E. Rice. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

Synthesis of reversible sequential circuits is a very new research area. It has been shown that such circuits can be implemented using quantum dot cellular automata. Other work has used traditional designs for sequential circuits and replaced the flip-flops and the gates with their reversible counterparts. Our earlier work uses a direct feedback method without any flip-flops, improving upon the replacement technique in both quantum cost and ancilla inputs. We present here a further improved version of the direct feedback method. Design examples show that the proposed method produces better results than our earlier method in terms of both quantum cost and ancilla inputs. We also propose the first technique for online testing of single line faults in sequential reversible circuits.

#### 1. Introduction

Moore’s law [1] predicted a continuous rise in the number of transistors per chip due to the continuous reduction in feature size. The popular thought is that Moore’s law will no longer hold true in about a decade when the feature size will approach the atomic level. DeBenedictis [2] showed that in CMOS technology feature size is no longer the primary challenge; rather energy dissipation is the new limiting factor. Current CMOS circuits implement Boolean logic networks, where the main contributor to heat generation is the energy in the 0 and 1 signals stored on wires. Each time a signal changes from one state to another and back again, joules of energy are turned into heat, where is the capacitance between the wire and the ground and is the power supply voltage. The most common number cited is , where is Boltzmann’s constant and is the ambient temperature in kelvin [2]. DeBenedictis [2] also stated that adiabatic and reversible logic essentially recycle joules of signal energy many times before dissipating as heat. Consequently, the energy drawn from the power supply could be reduced by as much as 100 times. However, signal energy recycling cannot take place in traditional Boolean networks. Therefore reversible logic may be the next promise for CMOS technology.

In a theoretical study, Landauer [3] stated that irreversible logic operations dissipate of heat energy when a bit of information is lost, where again is Boltzmann’s constant and is the operating temperature in kelvin. In another theoretical study, Bennett [4] showed that, from a thermodynamic point of view, if a circuit is both logically and physically reversible, then heat will not be dissipated. Experiments have shown that dissipation of no heat is not achievable; however, it has been experimentally demonstrated that reversible logic dissipates less heat than the thermodynamic limit of in physically irreversible low-power CMOS logic [5] and physically reversible superconductor flux logic (SFL) [6]. Thus, reversible logic is a favorable choice for low-power emerging computing technologies.

Reversible logic has become realizable in many emerging computing technologies such as superconductor flux logic (SFL) technology [6, 7], optical technology [8, 9], quantum dot cellular automata technology [10, 11], and nanotechnology [12]. In addition, quantum circuits are inherently reversible [13]. This is another reason why reversible logic has become a promising choice for low-power emerging computing technologies.

Reversible logic synthesis attempts have mostly focused on reversible combinational logic synthesis. Some of the most important but nonexhaustive work in this area is [14–23]. However, very few works have investigated reversible* sequential* logic synthesis. The major problem behind this lack of work is the prevailing thought that feedback is not possible in reversible logic and therefore reversible sequential circuits are not possible. However, in 1980, Toffoli [24] argued that if the feedback is provided through a delay element, then the feedback information will be available as the input to the reversible combinational circuit in the next clock cycle and thus a reversible sequential circuit is possible. Moreover, Thapliyal et al. [25] showed that reversible sequential circuits can be implemented using quantum dot cellular automata (QCA) technology by providing appropriate feedback timing by managing the clock of the QCA wire providing the feedback.

This paper presents a further improvement of our earlier work in designing a sequential circuit using direct feedback instead of flip-flops [26]. In addition, to our knowledge no other work has offered any technique for online testing of sequential circuits. Thus we also propose the first method of testing for single line faults in sequential circuits.

The rest of the paper is organized as follows. In Section 2, we discuss background for our proposed design method and related topics. We discuss related work on design of sequential circuits and online testing methods for combinational circuits in Section 3. In Section 4, we present our proposed method of designing sequential circuits. We show design examples in Section 5. In Section 6, we introduce our proposed method of online testing for single line faults in sequential circuits. We also present results for several benchmark circuits. Finally, in Section 8, we conclude the paper.

#### 2. Background

##### 2.1. Reversible Logic

A reversible function is a bijective mapping , where is the number of input variables. A reversible gate (or a circuit) implements a reversible function; that is, it maps the input combination to the output combination in a bijective manner. Thus a reversible gate (or a circuit) has the same number of inputs and outputs. In addition every input combination produces a unique output combination in a reversible circuit, and therefore for every output combination, the corresponding input combination can be uniquely determined.

A reversible circuit is constructed using reversible gates. The commonly used reversible gates are shown in Figure 1. Figure 1(a) shows the symbol of a NOT gate. It complements the input at the output; that is, . Figure 1(b) shows the symbol of a controlled-NOT (CNOT) or Feynman gate. The input is called the control input and its value is passed unchanged to the output; that is, . The input is called the target input. The target output has the value . Figure 1(c) shows the symbol of a three-input Toffoli gate (sometimes referred to as a controlled-controlled-NOT gate or CCNOT gate). The inputs and are called the control inputs and their values are passed unchanged to the outputs; that is, and . The input is called the target input and the target output has the value . Toffoli gates may have more than three inputs, in which case they may be referred to as multiple-controlled Toffoli gates. In an -input Toffoli gate, the first inputs (say ) are the control inputs and the last input (say ) is the target input. The value of the target output is . Figure 1(d) shows the symbol of a controlled swap gate, or Fredkin gate. Input is the control input and inputs and are targets. When the control input value is , then the target inputs and are passed unchanged to the outputs; that is, and . When the control input value is , then the target inputs are swapped at the outputs; that is, and . The outputs and can be expressed as and . When , then and . When , then and .