Table of Contents Author Guidelines Submit a Manuscript

Citations to this Journal [1,950 citations: 1–100 of 1,804 articles]

Articles published in VLSI Design have been cited 1,950 times. The following is a list of the 1,804 articles that have cited the articles published in VLSI Design.

  • Katherine Shu-Min Li, and Sying-Jyan Wang, “Design methodology of fault-Tolerant custom 3D network-on-chip,” ACM Transactions on Design Automation of Electronic Systems, vol. 22, no. 4, 2017. View at Publisher · View at Google Scholar
  • Hasna Bouraoui, Chadlia Jerad, Anupam Chattopadhyay, and Nejib Ben Hadj-Alouane, “Hardware Architectures for Embedded Speaker Recognition Applications,” ACM Transactions on Embedded Computing Systems, vol. 16, no. 3, pp. 1–28, 2017. View at Publisher · View at Google Scholar
  • Daniele Jahier Pagliari, Mario R. Casu, and Luca P. Carloni, “Accelerators for Breast Cancer Detection,” ACM Transactions on Embedded Computing Systems, vol. 16, no. 3, pp. 1–25, 2017. View at Publisher · View at Google Scholar
  • Mostafa Abounouh, Hassan Al Moatassime, and Abderrazak Chrifi, “Existence of global attractor for one-dimensional weakly damped nonlinear Schrödinger equation with Dirac interaction and artificial boundary condition in half-line,” Advances in Difference Equations, vol. 2017, no. 1, 2017. View at Publisher · View at Google Scholar
  • Darian Reyes Fernández De Bulnes, Juan Carlos Dibene Simental, Yazmin Maldonado, and Leonardo Trujillo, “High-Level Synthesis through metaheuristics and LUTs optimization in FPGA devices,” AI Communications, vol. 30, no. 2, pp. 151–168, 2017. View at Publisher · View at Google Scholar
  • Srdjan Dragomira Djordjevic, “Analog circuit sizing using local biasing,” Analog Integrated Circuits and Signal Processing, 2017. View at Publisher · View at Google Scholar
  • Yaping Mao, “Constructing edge-disjoint Steiner paths in lexicographic product networks,” Applied Mathematics and Computation, vol. 308, pp. 1–10, 2017. View at Publisher · View at Google Scholar
  • V. V. Sapozhnikov, Vl. V. Sapozhnikov, D. V. Efanov, and V. V. Dmitriev, “New structures of the concurrent error detection systems for logic circuits,” Automation and Remote Control, vol. 78, no. 2, pp. 300–312, 2017. View at Publisher · View at Google Scholar
  • D. V. Efanov, V. V. Sapozhnikov, and Vl. V. Sapozhnikov, “Conditions for detecting a logical element fault in a combination device under concurrent checking based on Berger’s code,” Automation and Remote Control, vol. 78, no. 5, pp. 891–901, 2017. View at Publisher · View at Google Scholar
  • Yaping Mao, Fengnan Yanling, Zhao Wang, and Chengfu Ye, “Proper Connection Number of Graph Products,” Bulletin of the Malaysian Mathematical Sciences Society, 2017. View at Publisher · View at Google Scholar
  • Sumbal Zahoor, and Shahzad Naseem, “Design and implementation of an efficient FIR digital filter,” Cogent Engineering, vol. 4, no. 1, 2017. View at Publisher · View at Google Scholar
  • José Morales-Escalante, Irene M. Gamba, Yingda Cheng, Armando Majorana, Chi-Wang Shu, and James Chelikowsky, “Discontinuous Galerkin deterministic solvers for a Boltzmann-Poisson model of hot electron transport by averaged empirical pseudopotential band structures,” Computer Methods in Applied Mechanics and Engineering, 2017. View at Publisher · View at Google Scholar
  • Dongdong He, and Kejia Pan, “An unconditionally stable linearized CCD–ADI method for generalized nonlinear Schrödinger equations with variable coefficients in two and three dimensions,” Computers & Mathematics with Applications, 2017. View at Publisher · View at Google Scholar
  • Zongliang ZhuanSun, Keqiu Li, and Guolong Chen, “Multipath routing algorithm for application-specific wormhole NoCs,” Concurrency and Computation: Practice and Experience, pp. e4027, 2017. View at Publisher · View at Google Scholar
  • Othmane El Mountassir, Brian G. Stewart, Alistair J. Reid, and Scott G. McMeekin, “Quantification of the performance of iterative and non-iterative computational methods of locating partial discharges using RF measurement techniques,” Electric Power Systems Research, vol. 143, pp. 110–120, 2017. View at Publisher · View at Google Scholar
  • Adnan Kabbani, “Optimum power supply for minimum energy in nano-CMOS circuits,” Electrical Engineering, 2017. View at Publisher · View at Google Scholar
  • Carna Radojicic, Christoph Grimm, Axel Jantsch, and Michael Rathmair, “Towards Verification of Uncertain Cyber-Physical Systems,” Electronic Proceedings in Theoretical Computer Science, vol. 247, pp. 1–17, 2017. View at Publisher · View at Google Scholar
  • Elyas Shivanian, and Ahmad Jafarabadi, “An efficient numerical technique for solution of two-dimensional cubic nonlinear Schrödinger equation with error analysis,” Engineering Analysis with Boundary Elements, vol. 83, pp. 74–86, 2017. View at Publisher · View at Google Scholar
  • Giovanni Mascali, and Vittorio Romano, “Exploitation of the Maximum Entropy Principle in Mathematical Modeling of Charge Transport in Semiconductors,” Entropy, vol. 19, no. 1, pp. 36, 2017. View at Publisher · View at Google Scholar
  • Umair F. Siddiqi, and Sadiq M. Sait, “A Game Theory Based Post-Processing Method to Enhance VLSI Global Routers,” IEEE Access, vol. 5, pp. 1328–1339, 2017. View at Publisher · View at Google Scholar
  • Shahed K. Mohammed, K. M. Mafijur Rahman, and Khan A. Wahid, “Lossless Compression in Bayer Color Filter Array for Capsule Endoscopy,” IEEE Access, vol. 5, pp. 13823–13834, 2017. View at Publisher · View at Google Scholar
  • M. G. Ancona, “Nonlinear Thermoelectroelastic Analysis of III-N Semiconductor Devices,” IEEE Journal of the Electron Devices Society, vol. 5, no. 5, pp. 320–334, 2017. View at Publisher · View at Google Scholar
  • Eyal Sarfati, Binyamin Frankel, Yitzhak Birk, and Shmuel Wimer, “Optimal VLSI Delay Tuning by Space Tapering With Clock-Tree Application,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 8, pp. 2160–2170, 2017. View at Publisher · View at Google Scholar
  • Honggang Qi, Qingming Huang, and Wen Gao, “A Bit-Plane Decomposition Matrix-Based VLSI Integer Transform Architecture for HEVC,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 3, pp. 349–353, 2017. View at Publisher · View at Google Scholar
  • Amin Farshidi, Laleh Behjat, Logan Rakai, and David Westwick, “A Multiobjective Cooptimization of Buffer and Wire Sizes in High-Performance Clock Trees,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 4, pp. 412–416, 2017. View at Publisher · View at Google Scholar
  • Anirban Sengupta, Saumya Bhadauria, and Saraju P. Mohanty, “TL-HLS: Methodology for Low Cost Hardware Trojan Security Aware Scheduling with Optimal Loop Unrolling Factor during High Level Synthesis,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, no. 4, pp. 660–673, 2017. View at Publisher · View at Google Scholar
  • Changlin Chen, Yaowen Fu, and Sorin Cotofana, “Towards Maximum Utilization of Remained Bandwidth in Defected NoC Links,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, no. 2, pp. 285–298, 2017. View at Publisher · View at Google Scholar
  • Minghua Tang, Xiaola Lin, and Maurizio Palesi, “The Repetitive Turn Model for Adaptive Routing,” IEEE Transactions on Computers, vol. 66, no. 1, pp. 138–146, 2017. View at Publisher · View at Google Scholar
  • Salma Hesham, Jens Rettkowski, Diana Goehringer, and Mohamed A. Abd El Ghany, “Survey on Real-Time Networks-on-Chip,” IEEE Transactions on Parallel and Distributed Systems, vol. 28, no. 5, pp. 1500–1517, 2017. View at Publisher · View at Google Scholar
  • Sihwan Kim, Sahil Shah, and Jennifer Hasler, “Calibration of Floating-Gate SoC FPAA System,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 9, pp. 2649–2657, 2017. View at Publisher · View at Google Scholar
  • Artjom Grudnitsky, Lars Bauer, and Jorg Henkel, “Efficient Partial Online Synthesis of Special Instructions for Reconfigurable Processors,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 2, pp. 594–607, 2017. View at Publisher · View at Google Scholar
  • Shuo Cai, Yinbo Zhou, Peng Liu, Fei Yu, and Wei Wang, “A novel test data compression approach based on bit reversion,” IEICE Electronics Express, 2017. View at Publisher · View at Google Scholar
  • Taehee Lee, and Joon-Sung Yang, “Physical-aware gating element insertion for thermal-safe scan shift operation,” IEICE Electronics Express, 2017. View at Publisher · View at Google Scholar
  • Anirban Sengupta, Saumya Bhadauria, and Saraju P. Mohanty, “Low-cost security aware HLS methodology,” IET Computers and Digital Techniques, vol. 11, no. 2, pp. 68–79, 2017. View at Publisher · View at Google Scholar
  • Amin Alahyari, Massoud Dousti, and Mohammad Bagher Tavakoli, “A Monolithic Low Noise Channelized Active Bandpass Filter Using GaAs 0.15 µm Technology,” IETE Journal of Research, pp. 1–7, 2017. View at Publisher · View at Google Scholar
  • S. Ghosh, and Apurva Muley, “Two stream instability in n-type gallium arsenide semiconductor quantum plasma,” Indian Journal of Physics, 2017. View at Publisher · View at Google Scholar
  • Muhammad Athar Javed Sethi, Fawnizu Azmadi Hussin, and Nor Hisham Hamid, “Bio-inspired fault tolerant network on chip,” Integration, the VLSI Journal, vol. 58, pp. 155–166, 2017. View at Publisher · View at Google Scholar
  • Chia Yee Ooi, Tomokazu Yoneda, Mahshid Mojtabavi Naeini, Sreedharan Baskara Dass, and Michiko Inoue, “An integrated DFT solution for power reduction in scan test applications by low power gating scan cell,” Integration, the VLSI Journal, vol. 57, pp. 108–124, 2017. View at Publisher · View at Google Scholar
  • Mahya Sam Daliri, Reza Faghih Mirzaee, Keivan Navi, and Nader Bagherzadeh, “High-Performance Ternary Operators for Scrambling,” Integration, the VLSI Journal, 2017. View at Publisher · View at Google Scholar
  • Xuke Hu, Hongchao Fan, and Alexey Noskov, “Roof model recommendation for complex buildings based on combination rules and symmetry features in footprints,” International Journal of Digital Earth, pp. 1–25, 2017. View at Publisher · View at Google Scholar
  • Swapnil Mhaske, Hojin Kee, Tai Ly, Ahsan Aziz, and Predrag Spasojevic, “FPGA-Based Channel Coding Architectures for 5G Wireless Using High-Level Synthesis,” International Journal of Reconfigurable Computing, vol. 2017, pp. 1–23, 2017. View at Publisher · View at Google Scholar
  • Z.A. Mann, and P.A. Papp, “Guiding SAT Solving by Formula Partitioning,” International Journal on Artificial Intelligence Tools, 2017. View at Publisher · View at Google Scholar
  • R. Rohith Krishnan, and S. Krishnakumar, “An Approach Towards Design of Analog Integrated Circuits Based on Fixator–Norator Pair,” Journal of Circuits, Systems and Computers, vol. 26, no. 06, pp. 1750100, 2017. View at Publisher · View at Google Scholar
  • R. Rohith Krishnan, S. Krishnakumar, and Reza Hashemian, “Fixator-Norator Pair Based Design of Feedback Networks for Analog Amplifier Circuits,” Journal of Circuits, Systems and Computers, pp. 1850050, 2017. View at Publisher · View at Google Scholar
  • Mohammad I. Hossain, Abdelkader Bousselham, Fahhad H. Alharbi, and Nouar Tabet, “Computational analysis of temperature effects on solar cell efficiency,” Journal of Computational Electronics, 2017. View at Publisher · View at Google Scholar
  • Christophe Besse, Pascal Noble, and David Sanchez, “Discrete transparent boundary conditions for the mixed KDV-BBM equation,” Journal of Computational Physics, 2017. View at Publisher · View at Google Scholar
  • Zhen-Xue He, Li-Min Xiao, Li Ruan, Fei Gu, Zhi-Sheng Huo, Guang-Jun Qin, Ming-Fa Zhu, Long-Bing Zhang, Rui Liu, and Xiang Wang, “A Power and Area Optimization Approach of Mixed Polarity Reed-Muller Expression for Incompletely Specified Boolean Functions,” Journal of Computer Science and Technology, vol. 32, no. 2, pp. 297–311, 2017. View at Publisher · View at Google Scholar
  • Ahmad Khademzadeh, Midia Reshadi, Kambiz Badie, and Babak Aghaei, “Link Testing: a Survey of Current Trends in Network on Chip,” Journal of Electronic Testing: Theory and Applications (JETTA), vol. 33, no. 2, pp. 209–225, 2017. View at Publisher · View at Google Scholar
  • Fernando Gutierrez, “Design of a Wideband Antenna for Wireless Network-On-Chip in Multimedia Applications,” Journal of Low Power Electronics and Applications, vol. 7, no. 2, pp. 6, 2017. View at Publisher · View at Google Scholar
  • Daniel Brox, “The Riemann Hypothesis and Emergent Phase Space,” Journal of Modern Physics, vol. 08, no. 04, pp. 459–482, 2017. View at Publisher · View at Google Scholar
  • Anjali Sharma, and Harsh Sohal, “Considerations for ultra-low-power VLSI design-A survey,” Journal of Nanoelectronics and Optoelectronics, vol. 12, no. 1, pp. 1–21, 2017. View at Publisher · View at Google Scholar
  • Farouk Amish, and El-Bay Bourennane, “An efficient hardware solution for 3D-HEVC intra-prediction,” Journal of Real-Time Image Processing, 2017. View at Publisher · View at Google Scholar
  • Muhammad Shafique, Sergio Bampi, Mateus Grellert, Bruno Zatt, and Jörg Henkel, “Complexity control of HEVC encoders targeting real-time constraints,” Journal of Real-Time Image Processing, vol. 13, no. 1, pp. 5–24, 2017. View at Publisher · View at Google Scholar
  • Weizhu Bao, Yongyong Cai, Xiaowei Jia, and Qinglin Tang, “Numerical Methods and Comparison for the Dirac Equation in the Nonrelativistic Limit Regime,” Journal of Scientific Computing, 2017. View at Publisher · View at Google Scholar
  • Farid Shamani, Roberto Airoldi, Vida Fakour Sevom, Tapani Ahonen, and Jari Nurmi, “FPGA Implementation Issues of a Flexible Synchronizer Suitable for NC-OFDM-Based Cognitive Radios,” Journal of Systems Architecture, vol. 76, pp. 102–116, 2017. View at Publisher · View at Google Scholar
  • R. Zieba Falama, Justin Mibaile, E. Guemene Dountio, Noël Djongyang, Serge Y. Doka, and Timoleon C. Kofane, “Effect of external applied electric field on the silicon solar cell’s thermodynamic efficiency,” Journal of Theoretical and Applied Physics, 2017. View at Publisher · View at Google Scholar
  • Andrej Bugajev, Raimondas Čiegis, Rima Kriauzienė, Teresė Leonavičienė, and Julius Žilinskas, “On the Accuracy of Some Absorbing Boundary Conditions for the Schrödinger Equation,” Mathematical Modelling and Analysis, pp. 1–16, 2017. View at Publisher · View at Google Scholar
  • S. E. Tsai, and S. M. Yang, “A Fast DCT Algorithm for Watermarking in Digital Signal Processor,” Mathematical Problems in Engineering, vol. 2017, pp. 1–7, 2017. View at Publisher · View at Google Scholar
  • Konstantin Berestizshevsky, Guy Even, Yaniv Fais, and Jonatan Ostrometzky, “SDNoC: Software Defined Network on a Chip,” Microprocessors and Microsystems, 2017. View at Publisher · View at Google Scholar
  • A.V. Anantha Lakshmi, and Gnanou Florence Sudha, “Design of a Reversible Floating-Point Square Root Using Modified Non-Restoring Algorithm,” Microprocessors and Microsystems, 2017. View at Publisher · View at Google Scholar
  • Elisabeth Glocker, Qingqing Chen, Ulf Schlichtmann, and Doris Schmitt-Landsiedel, “Emulation of an ASIC Power and Temperature Monitoring System (eTPMon) for FPGA Prototyping,” Microprocessors and Microsystems, 2017. View at Publisher · View at Google Scholar
  • Lech Jóźwiak, “Advanced mobile and wearable systems,” Microprocessors and Microsystems, vol. 50, pp. 202–221, 2017. View at Publisher · View at Google Scholar
  • Maha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio, Pascal Benoit, and Lionel Torres, “Computing reliability: On the differences between software testing and software fault injection techniques,” Microprocessors and Microsystems, vol. 50, pp. 102–112, 2017. View at Publisher · View at Google Scholar
  • Alireza Monemi, Jia Wei Tang, Maurizio Palesi, and Muhammad N. Marsono, “ProNoC: A Low Latency Network-on-Chip based Many-Core System-on-Chip Prototyping Platform,” Microprocessors and Microsystems, 2017. View at Publisher · View at Google Scholar
  • S. Astapov, J. Berdnikova, J. Ehala, J. Kaugerand, and J.-S. Preden, “Gunshot acoustic event identification and shooter localization in a WSN of asynchronous multichannel acoustic ground sensors,” Multidimensional Systems and Signal Processing, 2017. View at Publisher · View at Google Scholar
  • Jun Chen, Zhengyu Zhang, Min Zhu, Jintong Xu, and Xiangyang Li, “Optimization of InGaAs/InAlAs Avalanche Photodiodes,” Nanoscale Research Letters, vol. 12, no. 1, 2017. View at Publisher · View at Google Scholar
  • M. Darwish, L. Mangani, and F. Moukalled, “General fully implicit discretization of the diffusion term for the finite volume method,” Numerical Heat Transfer, Part B: Fundamentals, pp. 1–27, 2017. View at Publisher · View at Google Scholar
  • Rytis Juršėnas, “Irreducible tensor form for the spin-photon coupling,” Physics Letters A, 2017. View at Publisher · View at Google Scholar
  • Ubaid Ahmed Nisar, Waqas Ashraf, and Shamsul Qamar, “Application of Kinetic Flux Vector Splitting Scheme for Solving Multi-dimensional Hydrodynamical Models of Semiconductor Devices,” Results in Physics, 2017. View at Publisher · View at Google Scholar
  • Maurizio Masera, Lorenzo Re?Fiorentin, Enrico Masala, Guido Masera, and Maurizio Martina, “Analysis of HEVC transform throughput requirements for hardware implementations,” Signal Processing: Image Communication, 2017. View at Publisher · View at Google Scholar
  • Tolga Ayav, “Prioritizing MCDC test cases by spectral analysis of Boolean functions,” Software Testing, Verification and Reliability, pp. e1641, 2017. View at Publisher · View at Google Scholar
  • A. Gili, and J.P. Xanthakis, “On the Applicability of the Natori Formula to Realistic Multi-Layer Quantum Well III-V FETs,” Solid-State Electronics, 2017. View at Publisher · View at Google Scholar
  • Khanh N. Dang, Michael Meyer, Yuichi Okuyama, and Abderazek Ben Abdallah, “A low-overhead soft–hard fault-tolerant architecture, design and management scheme for reliable high-performance many-core 3D-NoC systems,” The Journal of Supercomputing, 2017. View at Publisher · View at Google Scholar
  • Mostafa Chakir, Hicham Akhamal, and Hassan Qjidaa, “A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor,” The Scientific World Journal, vol. 2017, pp. 1–15, 2017. View at Publisher · View at Google Scholar
  • Yu Wang, Jian Chen, and Chien-In Henry Chen, “Chebyshev Bandpass Filter Using Resonator of Tunable Active Capacitor and Inductor,” VLSI Design, vol. 2017, pp. 1–12, 2017. View at Publisher · View at Google Scholar
  • Sebastian Werner, Javier Navaridas, and Mikel Luján, “A Survey on Design Approaches to Circumvent Permanent Faults in Networks-on-Chip,” ACM Computing Surveys, vol. 48, no. 4, pp. 1–36, 2016. View at Publisher · View at Google Scholar
  • Abbas Dehghani, and Kamal Jamshidi, “A Novel Approach to Optimize Fault-Tolerant Hybrid Wireless Network-on-Chip Architectures,” ACM Journal on Emerging Technologies in Computing Systems, vol. 12, no. 4, pp. 1–37, 2016. View at Publisher · View at Google Scholar
  • Dong Xiang, and Kele Shen, “A New Unicast-Based Multicast Scheme for Network-on-Chip Router and Interconnect Testing,” Acm Transactions On Design Automation Of Electronic Systems, vol. 21, no. 2, 2016. View at Publisher · View at Google Scholar
  • Marcela Zuluaga, Peter Milder, and Markus Püschel, “Streaming Sorting Networks,” ACM Transactions on Design Automation of Electronic Systems, vol. 21, no. 4, pp. 1–30, 2016. View at Publisher · View at Google Scholar
  • Paul Bogdan, Chi-Ying Tsui, Radu Marculescu, and Zhiliang Qian, “Performance evaluation of NoC-based multicore systems: From traffic analysis to NoC latency modeling,” ACM Transactions on Design Automation of Electronic Systems, vol. 21, no. 3, 2016. View at Publisher · View at Google Scholar
  • Alirad Malek, Ioannis Sourdis, Stavros Tzilis, Yifan He, and Gerard Rauwerda, “RQNoC,” ACM Transactions on Embedded Computing Systems, vol. 15, no. 2, pp. 1–25, 2016. View at Publisher · View at Google Scholar
  • Edoardo Fusella, and Alessandro Cilardo, “Crosstalk-Aware Automated Mapping for Optical Networks-on-Chip,” ACM Transactions on Embedded Computing Systems, vol. 16, no. 1, pp. 1–26, 2016. View at Publisher · View at Google Scholar
  • Alban Bourge, Olivier Muller, and Frédéric Rousseau, “Generating Efficient Context-Switch Capable Circuits through Autonomous Design Flow,” ACM Transactions on Reconfigurable Technology and Systems, vol. 10, no. 1, pp. 1–23, 2016. View at Publisher · View at Google Scholar
  • Matthew D. Graaf, Bernadette V. Marquez, Nai-Hua Yeh, Suzanne E. Lapi, and Kevin D. Moeller, “New Methods for the Site-Selective Placement of Peptides on a Microelectrode Array: Probing VEGF–v107 Binding as Proof of Concept,” ACS Chemical Biology, 2016. View at Publisher · View at Google Scholar
  • Timothy A. Davis, Sivasankaran Rajamanickam, and Wissam M. Sid-Lakhdar, “A survey of direct methods for sparse linear systems,” Acta Numerica, vol. 25, pp. 383–566, 2016. View at Publisher · View at Google Scholar
  • Simona Grusea, and Anthony Labarre, “Asymptotic normality and combinatorial aspects of the prefix exchange distance distribution,” Advances in Applied Mathematics, vol. 78, pp. 94–113, 2016. View at Publisher · View at Google Scholar
  • Hua Fan, “A novel redundant cyclic method to improve the SFDR of SAR ADC,” Analog Integrated Circuits and Signal Processing, 2016. View at Publisher · View at Google Scholar
  • Maurits Ortmanns, Abdelrahman Elkafrawy, and Jens Anders, “Design and validation of a 10-bit current mode SAR ADC with 58.4 dB SFDR at 50 MS/s in 90 nm CMOS,” Analog Integrated Circuits and Signal Processing, vol. 89, no. 2, pp. 283–295, 2016. View at Publisher · View at Google Scholar
  • Penchalaiah Palla, Gopi Raja Uppu, Anita S Ethiraj, and J P Raina, “Bandgap engineered graphene and hexagonal boron nitride for resonant tunnelling diode,” Bulletin of Materials Science, 2016. View at Publisher · View at Google Scholar
  • Rui Jia, Rui Chen, Colin Yu Lin, Zhenhong Guo, and Haigang Yang, “Low cost 1D DCT core for multiple video codec,” Chinese Journal of Electronics, vol. 25, no. 6, pp. 1052–1057, 2016. View at Publisher · View at Google Scholar
  • Rong-Jun Cheng, and Yu-Min Cheng, “Solving unsteady Schrödinger equation using the improved element-free Galerkin method,” Chinese Physics B, vol. 25, no. 2, pp. 020203, 2016. View at Publisher · View at Google Scholar
  • M. Deivakani, and D. Shanthi, “Design of Efficient Router with Low Power and Low Latency for Network on Chip,” Circuits and Systems, vol. 07, no. 04, pp. 339–349, 2016. View at Publisher · View at Google Scholar
  • Shalini Radakirishnan Valliammal, and Sampath Palaniswami, “Multiplier Design Utilizing Tri Valued Logic for RLNS Based DSP Applications,” Circuits and Systems, vol. 07, no. 04, pp. 417–433, 2016. View at Publisher · View at Google Scholar
  • Orazio Muscato, and Tina Castiglione, “Electron transport in silicon nanowires having different cross-sections,” Communications in Applied and Industrial Mathematics, vol. 7, no. 2, 2016. View at Publisher · View at Google Scholar
  • K. K. Abgaryan, and D. L. Reviznikov, “Numerical simulation of the distribution of charge carrier in nanosized semiconductor heterostructures with account for polarization effects,” Computational Mathematics And Mathematical Physics, vol. 56, no. 1, pp. 161–172, 2016. View at Publisher · View at Google Scholar
  • Ubaid Ahmed Nisar, Waqas Ashraf, and Shamsul Qamar, “A splitting scheme based on the space–time CE/SE method for solving multi-dimensional hydrodynamical models of semiconductor devices,” Computer Physics Communications, 2016. View at Publisher · View at Google Scholar
  • Dohan Kim, “Sorting on graphs by adjacent swaps using permutation groups,” Computer Science Review, 2016. View at Publisher · View at Google Scholar
  • Trong-Yen Lee, Chi-Han Huang, Min-Jea Liu, and Jhen-Syuan Chen, “Adaptive instruction codec architecture design for network-on-chip,” Computers & Electrical Engineering, 2016. View at Publisher · View at Google Scholar
  • Mehdi Ayat, Hossein Hardani, Sattar Mirzakuchaki, and Farzan Haddadi, “Design and implementation of high throughput FPGA-based DVB-T system,” Computers & Electrical Engineering, vol. 51, pp. 43–57, 2016. View at Publisher · View at Google Scholar
  • Lei Bian, Songsong Ji, Gang Pang, and Shaoqiang Tang, “Accurate boundary treatment for transient Schrödinger equation under polar coordinates,” Computers & Mathematics with Applications, 2016. View at Publisher · View at Google Scholar