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Citations to this Journal [1,952 citations: 101–200 of 1,806 articles]

Articles published in VLSI Design have been cited 1,952 times. The following is a list of the 1,806 articles that have cited the articles published in VLSI Design.

  • Mehdi Ayat, Hossein Hardani, Sattar Mirzakuchaki, and Farzan Haddadi, “Design and implementation of high throughput FPGA-based DVB-T system,” Computers & Electrical Engineering, vol. 51, pp. 43–57, 2016. View at Publisher · View at Google Scholar
  • Lei Bian, Songsong Ji, Gang Pang, and Shaoqiang Tang, “Accurate boundary treatment for transient Schrödinger equation under polar coordinates,” Computers & Mathematics with Applications, 2016. View at Publisher · View at Google Scholar
  • Shengliang Zhang, and Siyan Chen, “A meshless symplectic method for two-dimensional Schrödinger equation with radial basis functions,” Computers & Mathematics with Applications, 2016. View at Publisher · View at Google Scholar
  • Wei Quan, and Andy D. Pimentel, “A hierarchical run-time adaptive resource allocation framework for large-scale MPSoC systems,” Design Automation for Embedded Systems, 2016. View at Publisher · View at Google Scholar
  • Hong-Yan Chen, Jian-Hao Hu, Shang Ma, and Chen-Hao Wang, “A weight pre-assignment scheme for Chinese remainder theorem,” Dianzi Keji Daxue Xuebao/Journal of the University of Electronic Science and Technology of China, vol. 45, no. 2, pp. 161–167, 2016. View at Publisher · View at Google Scholar
  • Eryk Dutkiewicz, Meriam Gay Bautista, and Michael Heimlich, “Subthreshold energy harvesters circuits for biomedical implants applications,” EAI Endorsed Transactions on Energy Web, vol. 16, no. 9, 2016. View at Publisher · View at Google Scholar
  • A. Dilello, B. Rumberg, and D.W. Graham, “Multiplexing high-side load switch using adaptive well biasing,” Electronics Letters, 2016. View at Publisher · View at Google Scholar
  • P. R. Singh, Y. Wang, and P. Charge, “Bistatic MIMO radar for near field source localisation using PARAFAC,” Electronics Letters, vol. 52, no. 12, pp. 1060–+, 2016. View at Publisher · View at Google Scholar
  • C. Senthilpari, K. Diwakar, Kumar Munusamy, and J. Sheela Francisca, “Layout parameter analysis in Shannon expansion theorem based on 32bit adder circuit,” Engineering Science and Technology, an International Journal, 2016. View at Publisher · View at Google Scholar
  • Luis Bonilla, and Manuel Carretero, “Maximum Entropy Closure of Balance Equations for Miniband Semiconductor Superlattices,” Entropy, vol. 18, no. 7, pp. 260, 2016. View at Publisher · View at Google Scholar
  • Orazio Muscato, and Tina Castiglione, “A Hydrodynamic Model for Silicon Nanowires Based on the Maximum Entropy Principle,” Entropy, vol. 18, no. 10, pp. 368, 2016. View at Publisher · View at Google Scholar
  • Marko Kovandžić, Vlastimir Nikolić, Abdulathim Al-Noori, Ivan Ćirić, and Miloš Simonović, “Near Field Acoustic Localization Under Unfavorable Conditions Using Feedforward Neural Network For Processing Time Difference Of Arrival,” Expert Systems with Applications, 2016. View at Publisher · View at Google Scholar
  • Ireneusz Mrozek, and Vyacheslav Yarmolik, “Multiple Controlled Random Testing,” Fundamenta Informaticae, vol. 144, no. 1, pp. 23–43, 2016. View at Publisher · View at Google Scholar
  • Andreas Fichtner, Laurent Stehly, Laura Ermert, and Christian Boehm, “Generalized interferometry – I: theory for interstation correlations,” Geophysical Journal International, vol. 208, no. 2, pp. 603–638, 2016. View at Publisher · View at Google Scholar
  • Wen-Ming Tang, and Gui-Xiong Liu, “FPGA fixed-point technology of exponential function achieved by CORDIC algorithm,” Huanan Ligong Daxue Xuebao/Journal of South China University of Technology (Natural Science), vol. 44, no. 7, pp. 9–14, 2016. View at Publisher · View at Google Scholar
  • Anirban Sengupta, and Saumya Bhadauria, “Exploring Low Cost Optimal Watermark for Reusable IP Cores during High Level Synthesis,” IEEE Access, vol. 4, pp. 2198–2215, 2016. View at Publisher · View at Google Scholar
  • Jordane Lorandel, Jean-Christophe Prevotet, and Maryline Helard, “Fast Power and Performance Evaluation of FPGA-Based Wireless Communication Systems,” IEEE Access, vol. 4, pp. 2005–2018, 2016. View at Publisher · View at Google Scholar
  • Malgorzata Marek-Sadowska, “Automated Routing for VLSI: Kuh's Group Contributions,” IEEE Circuits and Systems Magazine, vol. 16, no. 2, pp. 35–49, 2016. View at Publisher · View at Google Scholar
  • P. Garcia, T. Gomes, J. Monteiro, A. Tavares, and M. Ekpanyapong, “On-Chip Message Passing Sub-System for Embedded Inter-Domain Communication,” IEEE Computer Architecture Letters, vol. 15, no. 1, pp. 33–36, 2016. View at Publisher · View at Google Scholar
  • Dirk Schulz, and Azhar Mahmood, “Approximation of a Phase Space Operator for the Numerical Solution of the Wigner Equation,” Ieee Journal Of Quantum Electronics, vol. 52, no. 2, 2016. View at Publisher · View at Google Scholar
  • Mohammad J. Sharifi, and Davoud Bahrepour, “A Multiloop and Full Amplitude Hysteresis Model for Molecular Electronics,” Ieee Transactions On Computer-Aided Design Of Integrated Circuits And Systems, vol. 35, no. 2, pp. 187–196, 2016. View at Publisher · View at Google Scholar
  • Mukesh Agrawal, Krishnendu Chakrabarty, and Bill Eklow, “A Distributed, Reconfigurable, and Reusable BIST Infrastructure for Test and Diagnosis of 3-D-Stacked ICs,” Ieee Transactions On Computer-Aided Design Of Integrated Circuits And Systems, vol. 35, no. 2, pp. 309–322, 2016. View at Publisher · View at Google Scholar
  • Zhi-Liang Qian, Da-Cheng Juan, Paul Bogdan, Chi-Ying Tsui, Diana Marculescu, and Radu Marculescu, “A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 35, no. 3, pp. 471–484, 2016. View at Publisher · View at Google Scholar
  • Anastasios Psarras, Junghee Lee, Ioannis Seitanidis, Chrysostomos Nicopoulos, and Giorgos Dimitrakopoulos, “PhaseNoC: Versatile Network Traffic Isolation Through TDM-Scheduled Virtual Channels,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 35, no. 5, pp. 844–857, 2016. View at Publisher · View at Google Scholar
  • Mohamad El Ahmad, Gilles Sassatelli, Lionel Torres, Mohamad Najem, and Pascal Benoit, “A Design-Time Method for Building Cost-Effective Run-Time Power Monitoring,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. PP, no. 99, 2016. View at Publisher · View at Google Scholar
  • Ritesh Parikh, and Valeria Bertacco, “Resource Conscious Diagnosis and Reconfiguration for NoC Permanent Faults,” IEEE Transactions on Computers, vol. 65, no. 7, pp. 2241–2256, 2016. View at Publisher · View at Google Scholar
  • Marek Parfieniuk, and Sang Yoon Park, “Sparse-Iteration 4D CORDIC Algorithms for Multiplying Quaternions,” IEEE Transactions on Computers, vol. 65, no. 9, pp. 2859–2871, 2016. View at Publisher · View at Google Scholar
  • Anastasios Psarras, Ioannis Seitanidis, Chrysostomos Nicopoulos, and Giorgos Dimitrakopoulos, “ShortPath: A Network-on-Chip Router with Fine-Grained Pipeline Bypassing,” IEEE Transactions on Computers, pp. 1–1, 2016. View at Publisher · View at Google Scholar
  • Freek Verbeek, Pooria M. Yaghini, Ashkan Eghbal, and Nader Bagherzadeh, “Deadlock Verification of Cache Coherence Protocols and Communication Fabrics,” IEEE Transactions on Computers, pp. 1–1, 2016. View at Publisher · View at Google Scholar
  • Samuel Sordo-Ibanez, Blanca Pinero-Garcia, Manuel Munoz-Diaz, Antonio Ragel-Morales, Joaquin Ceballos-Caceres, Luis Carranza-Gonzalez, Servando Espejo-Meana, Alberto Arias-Drake, Juan Ramos-Martos, Jose Miguel Mora-Gutierrez, and Miguel Angel Lagos-Florido, “CMOS Rad-Hard Front-End Electronics for Precise Sensors Measurements,” IEEE Transactions on Nuclear Science, vol. 63, no. 4, pp. 2379–2389, 2016. View at Publisher · View at Google Scholar
  • Davide Zoni, Jose Flich, and William Fornaciari, “CUTBUF: Buffer Management and Router Design for Traffic Mixing in VNET-Based NoCs,” IEEE Transactions on Parallel and Distributed Systems, vol. 27, no. 6, pp. 1603–1616, 2016. View at Publisher · View at Google Scholar
  • Taimour Wehbe, and Xiaofang Wang, “Secure and Dependable NoC-Connected Systems on an FPGA Chip,” IEEE Transactions on Reliability, vol. 65, no. 4, pp. 1852–1863, 2016. View at Publisher · View at Google Scholar
  • Mauro Baluda, Giovanni Denaro, and Mauro Pezze, “Bidirectional Symbolic Analysis for Effective Branch Testing,” IEEE Transactions on Software Engineering, vol. 42, no. 5, pp. 403–426, 2016. View at Publisher · View at Google Scholar
  • Diego Javier Reinoso Chisaguano, Yafei Hou, Takeshi Higashino, and Minoru Okada, “Low-Complexity Channel Estimation and Detection for MIMO-OFDM Receiver With ESPAR Antenna,” IEEE Transactions on Vehicular Technology, vol. 65, no. 10, pp. 8297–8308, 2016. View at Publisher · View at Google Scholar
  • Tooraj Nikoubin, Mahdieh Grailoo, and Changzhi Li, “Energy and Area Efficient Three-Input XOR/XNORs With Systematic Cell Design Methodology,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 1, pp. 398–402, 2016. View at Publisher · View at Google Scholar
  • Mona Moradi, Reza Faghih Mirzaee, and Keivan Navi, “New current-mode multipliers by CNTFET-based n-valued binary converters,” IEICE Transactions on Electronics, vol. E99C, no. 1, pp. 100–107, 2016. View at Publisher · View at Google Scholar
  • Akram Ben Ahmed, Hiroki Matsutani, Michihiro Koibuchi, Kimiyoshi Usami, and Hideharu Amano, “Multi-voltage variable pipeline routers with the same clock frequency for low-power network-on-chips systems,” IEICE Transactions on Electronics, vol. E99C, no. 8, pp. 909–917, 2016. View at Publisher · View at Google Scholar
  • Yuan He, Masaaki Kondo, Takashi Nakada, Hiroshi Sasaki, Shinobu Miwa, and Hiroshi Nakamura, “A Runtime Optimization Selection Framework to Realize Energy Efficient Networks-on-Chip,” IEICE Transactions on Information and Systems, vol. E99.D, no. 12, pp. 2881–2890, 2016. View at Publisher · View at Google Scholar
  • Lakshminarayanan Gopalakrishnan, Nithish Kumar Venkatachalam, and Mathini Sellathurai, “Low complexity and area efficient reconfigurable multimode interleaver address generator for multistandard radios,” IET Computers and Digital Techniques, vol. 10, no. 2, pp. 59–68, 2016. View at Publisher · View at Google Scholar
  • Kiho Choi, Euee S. Jang, and Sang-hyo Park, “Zero coefficient-aware fast butterfly-based inverse discrete cosine transform algorithm,” IET Image Processing, vol. 10, no. 2, pp. 89–100, 2016. View at Publisher · View at Google Scholar
  • Agees Kumar C., Sivarani T.S., and Joseph Jawhar S., “Intensive random carrier pulse width modulation for induction motor drives based on hopping between discrete carrier frequencies,” IET Power Electronics, 2016. View at Publisher · View at Google Scholar
  • Amit Kumar Mishra, and Sesham Srinu, “Cooperative sensing based on permutation entropy with adaptive thresholding technique for cognitive radio networks,” IET Science, Measurement and Technology, vol. 10, no. 8, pp. 934–942, 2016. View at Publisher · View at Google Scholar
  • Paolo Meloni, Claudio Rubattu, Giuseppe Tuveri, and Luigi Raffo, “A Custom dual-processor System for Real-time Neural Signal Processing,” IFAC-PapersOnLine, vol. 49, no. 25, pp. 61–67, 2016. View at Publisher · View at Google Scholar
  • Dariusz Polok, and Edward Hrynkiewicz, “Some Observations Related to Searching for Logic Functions Decomposition in Reed-Muller Spectral Domain,” IFAC-PapersOnLine, vol. 49, no. 25, pp. 104–108, 2016. View at Publisher · View at Google Scholar
  • Sreyasi Banerjee, and Basudev Ghosh, “Effect of doping on amplitude modulation of space-charge wave in semiconductor quantum plasma,” Indian Journal of Physics, 2016. View at Publisher · View at Google Scholar
  • Ravi, and Dodiya Chandni, “Built in self test architecture using concurrent approach,” Indian Journal of Science and Technology, vol. 9, no. 20, 2016. View at Publisher · View at Google Scholar
  • Sadiq M. Sait, and Umair F. Siddiqi, “A stochastic evolution algorithm based 2D VLSI global router,” Integration, the VLSI Journal, vol. 53, pp. 115–125, 2016. View at Publisher · View at Google Scholar
  • Muhammad Athar Javed Sethi, Fawnizu Azmadi Hussin, and Nor Hisham Hamid, “Bio-inspired NoC Fault Tolerant Techniques using Guaranteed Throughput and Best Effort Services,” Integration, the VLSI Journal, 2016. View at Publisher · View at Google Scholar
  • H. M. El Misilmani, M. Y. Abou-Shahine, Y. Nasser, and K. Y. Kabalan, “Recent Advances on Radio-Frequency Design in Cognitive Radio,” International Journal of Antennas and Propagation, vol. 2016, pp. 1–16, 2016. View at Publisher · View at Google Scholar
  • M.M. Islam, M.R.I. Faruque, N. Misran, and M.T. Islam, “Detection of breast cancer using electromagnetic techniques: A review,” International Journal of Applied Electromagnetics and Mechanics, vol. 51, no. 3, pp. 215–233, 2016. View at Publisher · View at Google Scholar
  • Rokhsare Izadi Saadi, and Ahmad Hakimi, “Low-power and low-noise complementary metal oxide semiconductor distributed amplifier using the gain-peaking technique,” International Journal of Circuit Theory and Applications, 2016. View at Publisher · View at Google Scholar
  • B. Lakshmi, and A. S. Dhar, “Low latency pipelined CORDIC-like rotator architecture,” International Journal of Electronics, pp. 1–15, 2016. View at Publisher · View at Google Scholar
  • Kowsalya P., Anitha P., and Ramanathan P., “Modified low power Wallace Tree multiplier using higher order compressors,” International Journal of Electronics Letters, vol. 5, no. 2, pp. 177–188, 2016. View at Publisher · View at Google Scholar
  • Rohith Krishnan, and Krishnakumar, “Application of op-amp fixators in analog circuits,” International Journal of Engineering and Technology, vol. 8, no. 5, pp. 1936–1941, 2016. View at Publisher · View at Google Scholar
  • D. E. Ivanov, “Parallel Simulation Algorithm of VLSI for Multicore Workstations with Dynamic Faults Grouping,” International Journal of Modeling and Optimization, vol. 6, no. 3, pp. 166–170, 2016. View at Publisher · View at Google Scholar
  • Bo Cheng, Xuefeng Guan, Huayi Wu, and Rui Li, “Hypergraph+: An Improved Hypergraph-Based Task-Scheduling Algorithm for Massive Spatial Data Processing on Master-Slave Platforms,” ISPRS International Journal of Geo-Information, vol. 5, no. 8, pp. 141, 2016. View at Publisher · View at Google Scholar
  • Poppy Siddiqua, and Stephen K. O'Leary, “The sensitivity of the electron transport within bulk zinc-blende gallium nitride to variations in the crystal temperature, the doping concentration, and the non-parabolicity coefficient associated with the lowest energy conduction band valley,” Journal of Applied Physics, vol. 120, no. 9, pp. 095701, 2016. View at Publisher · View at Google Scholar
  • Saleh Fakhrali, and Hamid R. Zarandi, “Double Stairs: A Fault-Tolerant Routing Algorithm for Networks-on-Chip,” Journal of Circuits, Systems and Computers, pp. 1650065, 2016. View at Publisher · View at Google Scholar
  • Pankaj Kumar, and Rajender Kumar Sharma, “Low-Power and Area-Efficient Parallel Multiplier Design Using Two-Dimensional Bypassing,” Journal of Circuits, Systems and Computers, pp. 1750030, 2016. View at Publisher · View at Google Scholar
  • Jayanthi, Sivasubramanian, and Gunavathi, “Chip area minimization with voltage-island and fixed-outline constraints using dual level meta-heuristic optimization algorithms,” Journal of Computational and Theoretical Nanoscience, vol. 13, no. 7, pp. 4427–4438, 2016. View at Publisher · View at Google Scholar
  • Lei Bian, Gang Pang, Shaoqiang Tang, and Anton Arnold, “ALmost EXact boundary conditions for transient Schrödinger-Poisson system,” Journal of Computational Physics, 2016. View at Publisher · View at Google Scholar
  • Florian Schneider, “Kershaw closures for linear transport equations in slab geometry,” Journal of Computational Physics, 2016. View at Publisher · View at Google Scholar
  • Thierry Sousbie, and Stéphane Colombi, “ColDICE: A parallel Vlasov-Poisson solver using moving adaptive simplicial tessellation,” Journal of Computational Physics, 2016. View at Publisher · View at Google Scholar
  • Ahmad Golbabai, and Ahmad Nikpour, “Computing a numerical solution of two dimensional non-linear Schrödinger equation on complexly shaped domains by RBF based differential quadrature method,” Journal of Computational Physics, 2016. View at Publisher · View at Google Scholar
  • Yong Wang, Chun Liu, and Zhong Tan, “Well-posedness on a new hydrodynamic model of the fluid with the dilute charged particles,” Journal of Differential Equations, 2016. View at Publisher · View at Google Scholar
  • B. Lenardo, Y. Li, A. Manalaysay, J. Morad, C. Payne, S. Stephenson, M. Szydagis, and M. Tripathi, “Position reconstruction of bubble formation in liquid nitrogen using piezoelectric sensors,” Journal of Instrumentation, vol. 11, no. 01, pp. P01013–P01013, 2016. View at Publisher · View at Google Scholar
  • Yaping Mao, Zhiwei Guo, Nan Jia, and He Li, “ Linear k -Arboricity in Product Networks ,” Journal of Interconnection Networks, vol. 16, no. 03n04, pp. 1650008, 2016. View at Publisher · View at Google Scholar
  • Sangheon Oh, and Kyusik Park, “Optimal Acoustic Sound Localization System Based on a Tetrahedron-Shaped Microphone Array,” Journal of KIISE, vol. 43, no. 1, pp. 13–26, 2016. View at Publisher · View at Google Scholar
  • Jennifer Hasler, Sihwan Kim, and Farhan Adil, “Scaling Floating-Gate Devices Predicting Behavior for Programmable and Configurable Circuits and Systems,” Journal of Low Power Electronics and Applications, vol. 6, no. 3, pp. 13, 2016. View at Publisher · View at Google Scholar
  • Binyamin Frankel, and Shmuel Wimer, “Optimal VLSI Delay Tuning by Wire Shielding,” Journal of Optimization Theory and Applications, 2016. View at Publisher · View at Google Scholar
  • Akram Ben Ahmed, and Abderazek Ben Abdallah, “Adaptive fault-tolerant architecture and routing algorithm for reliable many-core 3D-NoC systems,” Journal of Parallel and Distributed Computing, 2016. View at Publisher · View at Google Scholar
  • Xiaolei Wang, Jinjuan Xiang, Shengkai Wang, Wenwu Wang, Chao Zhao, Tianchun Ye, Yuhua Xiong, and Jing Zhang, “ Remote interfacial dipole scattering and electron mobility degradation in Ge field-effect transistors with GeO x /Al 2 O 3 gate dielectrics ,” Journal of Physics D: Applied Physics, vol. 49, no. 25, pp. 255104, 2016. View at Publisher · View at Google Scholar
  • A. Bhattacharjee, and A. Sutradhar, “Data driven nonparametric identification and model based control of glucose-insulin process in type 1 diabetics,” Journal of Process Control, vol. 41, pp. 14–25, 2016. View at Publisher · View at Google Scholar
  • Mukul Shirvaikar, Yamuna Lagadapati, and Xuanliang N. Dong, “Semivariogram analysis of bone images implemented on FPGA architectures,” Journal of Real-Time Image Processing, 2016. View at Publisher · View at Google Scholar
  • Francesca Palumbo, Tiziana Fanni, Carlo Sau, and Paolo Meloni, “Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy,” Journal of Signal Processing Systems, 2016. View at Publisher · View at Google Scholar
  • Mohamed El-Hadedy, Xinfei Guo, Martin Margala, Mircea R. Stan, and Kevin Skadron, “Dual-Data Rate Transpose-Memory Architecture Improves the Performance, Power and Area of Signal-Processing Systems,” Journal of Signal Processing Systems, 2016. View at Publisher · View at Google Scholar
  • Jeevan Sirkunan, Chia Yee Ooi, N. Shaikh-Husin, Yuan Wen Hau, and M.N. Marsono, “Hardware Transactional Memory Architecture with Adaptive Version Management for Multi-Processor FPGA Platforms,” Journal of Systems Architecture, 2016. View at Publisher · View at Google Scholar
  • Lorenzo Verdoscia, and Roberto Giorgi, “A Data-Flow Soft-Core Processor for Accelerating Scientific Calculation on FPGAs,” Mathematical Problems in Engineering, vol. 2016, pp. 1–21, 2016. View at Publisher · View at Google Scholar
  • Kaiman Zeng, Nansong Wu, Arman Sargolzaei, and Kang Yen, “Learn to Rank Images: A Unified Probabilistic Hypergraph Model for Visual Search,” Mathematical Problems in Engineering, vol. 2016, pp. 1–7, 2016. View at Publisher · View at Google Scholar
  • C.M. Cheng, Z.K. Peng, W.M. Zhang, and G. Meng, “Volterra-series-based nonlinear system modeling and its engineering applications: A state-of-the-art review,” Mechanical Systems and Signal Processing, 2016. View at Publisher · View at Google Scholar
  • Jie Xiao, William Lee, Jianhui Jiang, and Xuhua Yang, “Circuit reliability estimation based on an iterative PTM model with hybrid coding,” Microelectronics Journal, vol. 52, pp. 117–123, 2016. View at Publisher · View at Google Scholar
  • Mahya Sam Daliri, Reza Faghih Mirzaee, Keivan Navi, and Nader Bagherzadeh, “Ternary cyclic redundancy check by a new hardware-friendly ternary operator,” Microelectronics Journal, vol. 54, pp. 126–137, 2016. View at Publisher · View at Google Scholar
  • Khader Mohammad, Ahsan Kabeer, Tarek M. Taha, Muhsen Owaida, and Mahdi Washha, “Off-chip bus power minimization using serialization with cache-based encoding,” Microelectronics Journal, vol. 54, pp. 138–149, 2016. View at Publisher · View at Google Scholar
  • Po-Jen Hsu, Yu-Hao Tseng, Wei-Jhe Chen, and Chung-An Shen, “The design and implementation of a configurable MIMO detection system on the NOC-based multicore platform,” Microelectronics Journal, vol. 56, pp. 25–37, 2016. View at Publisher · View at Google Scholar
  • S. Rösch, H. Rauchfuss, S. Wallentowitz, T. Wild, and A. Herkersdorf, “MPSoC application resilience by hardware-assisted communication virtualization,” Microelectronics Reliability, 2016. View at Publisher · View at Google Scholar
  • Edoardo Fusella, and Alessandro Cilardo, “Minimizing Power Loss in Optical Networks-on-Chip through Application-Specific Mapping,” Microprocessors and Microsystems, 2016. View at Publisher · View at Google Scholar
  • Mohammed El-Shafei, Imtiaz Ahmad, and Mohammad Gh. Alfailakawi, “Implementation of Harmony Search on Embedded Platform,” Microprocessors and Microsystems, 2016. View at Publisher · View at Google Scholar
  • Andrew J. Metcalf, Hyoung-Jun Kim, Daniel E. Leaird, Jose A. Jaramillo-Villegas, Keith A. McKinzie, Vikrant Lal, Amir Hosseini, Gloria E. Hoefler, Fred Kish, and Andrew M. Weiner, “Integrated line-by-line optical pulse shaper for high-fidelity and rapidly reconfigurable RF-filtering,” Optics Express, vol. 24, no. 21, pp. 23925, 2016. View at Publisher · View at Google Scholar
  • Somayeh Arbabi, and Mohammad Najafi, “Exact solitary wave solutions of the complex nonlinear Schrödinger equations,” Optik - International Journal for Light and Electron Optics, 2016. View at Publisher · View at Google Scholar
  • Chia-Jung Chang, Cheng-Chung Lee, Yueh-Te Chan, Devin L. Trudeau, Mei-Huey Wu, Chih-Hsuan Tsai, Su-May Yu, Tuan-Hua David Ho, Andrew H. -J. Wang, Chwan-Deng Hsiao, Frances H. Arnold, and Yu-Chan Chao, “Exploring the Mechanism Responsible for Cellulase Thermostability by Structure-Guided Recombination,” Plos One, vol. 11, no. 3, 2016. View at Publisher · View at Google Scholar
  • R. Kavya, and S. Santhosh Kumar, “Window Based Input Vector Monitoring Concurrent BIST Using SRAM Cells with Diagnostic Data Compression,” Procedia Technology, vol. 24, pp. 1048–1054, 2016. View at Publisher · View at Google Scholar
  • Ivan Garcia-Hallo, Dominique Lemaire, Nathalie Raveu, and Gilles Peres, “Method For P-Static Source Location On Aircraft Using Time Domain Measurements,” Progress In Electromagnetics Research C, vol. 62, pp. 89–98, 2016. View at Publisher · View at Google Scholar
  • B.G. Sileshi, J. Oliver, R. Toledo, J. Gonçalves, and P. Costa, “On the behaviour of low cost laser scanners in HW/SW particle filter SLAM applications,” Robotics and Autonomous Systems, 2016. View at Publisher · View at Google Scholar
  • Alexander Zlotnik, and Ilya Zlotnik, “Remarks on discrete and semi-discrete transparent boundary conditions for solving the time-dependent Schrodinger equation on the half-axis,” Russian Journal Of Numerical Analysis And Mathematical Modelling, vol. 31, no. 1, pp. 51–64, 2016. View at Publisher · View at Google Scholar
  • D. Muralidharan, and R. Muthaiah, “Bus Based Synchronization Method for CHIPPER Based NoC,” Scientific Programming, vol. 2016, pp. 1–11, 2016. View at Publisher · View at Google Scholar
  • Afiq Hamzah, Fatimah A Hamid, and Razali Ismail, “Explicit continuous charge-based compact model for long channel heavily doped surrounding-gate MOSFETs incorporating interface traps and quantum effects,” Semiconductor Science and Technology, vol. 31, no. 12, pp. 125020, 2016. View at Publisher · View at Google Scholar
  • Ramin Mirzazadeh, Saeed Eftekhar Azam, and Stefano Mariani, “Micromechanical Characterization of Polysilicon Films through On-Chip Tests,” Sensors, vol. 16, no. 8, pp. 1191, 2016. View at Publisher · View at Google Scholar
  • Nuno Brito, Carlos Ferreira, Filipe Alves, Jorge Cabral, João Gaspar, João Monteiro, and Luís Rocha, “Digital Platform for Wafer-Level MEMS Testing and Characterization Using Electrical Response,” Sensors, vol. 16, no. 9, pp. 1553, 2016. View at Publisher · View at Google Scholar
  • Eurico Esteves Moreira, Vasco Lima, Filipe Serra Alves, Jorge Cabral, João Gaspar, and Luis Alexandre Rocha, “Full-gap Tracking System for Parallel Plate Electrostatic Actuators using Closed-Loop Control,” Sensors and Actuators A: Physical, 2016. View at Publisher · View at Google Scholar
  • Yong Wang, Chun Liu, and Zhong Tan, “A Generalized Poisson--Nernst--Planck--Navier--Stokes Model on the Fluid with the Crowded Charged Particles: Derivation and Its Well-Posedness,” SIAM Journal on Mathematical Analysis, vol. 48, no. 5, pp. 3191–3235, 2016. View at Publisher · View at Google Scholar