VLSI Design

A Practical Load-optimized VCO Design for Low-jitter 5V 500 MHz Digital Phase-locked Loop

Spectral Interpretation and Applications of Decision Diagrams

Exact Output Response Computation of RC Interconnects Under General Polynomial Input Waveforms

Optimal Detector Design for On-line Testing of Linear Analog Systems

Self-checking Synchronous FSM Network Design with Low Overhead

Novel Single and Double Output TSC CMOS Checkers for m-out-of-n Codes

An Analytical, Temperature-dependent Model for Majority- and Minority-carrier Mobility in Silicon Devices

A Chip for a Routing Table Based on a Novel Modified Trie Algorithm

Low Power VLSI Implementation of the DCT on Single Multiplier DSP Processors

Analytical and Computational Advances for Hydrodynamic Models of Classical and Quantum Charge Transport

Signal Coding and CMOS Gates for Combinational Functional Blocks of Very Deep Submicron Self-checking Circuits

An Integrated Approach to Data Path Synthesis for Behavioral-level Power Optimization

3D Simulations of Ultra-small MOSFETs with Real-space Treatment of the Electron – Electron and Electron-ion Interactions

The Chapman-Enskog Expansion and the Quantum Hydrodynamic Model for Semiconductor Devices

Graphical Design Techniques for Fixed-point Multiplication

VLSI Design

Table of Contents

Table of Contents: 2000

A Practical Load-optimized VCO Design for Low-jitter 5V 500 MHz Digital Phase-locked Loop

Spectral Interpretation and Applications of Decision Diagrams

Exact Output Response Computation of RC Interconnects Under General Polynomial Input Waveforms

Optimal Detector Design for On-line Testing of Linear Analog Systems

Self-checking Synchronous FSM Network Design with Low Overhead

Novel Single and Double Output TSC CMOS Checkers for m-out-of-n Codes

An Analytical, Temperature-dependent Model for Majority- and Minority-carrier Mobility in Silicon Devices

A Chip for a Routing Table Based on a Novel Modified Trie Algorithm

Low Power VLSI Implementation of the DCT on Single Multiplier DSP Processors

Analytical and Computational Advances for Hydrodynamic Models of Classical and Quantum Charge Transport

Signal Coding and CMOS Gates for Combinational Functional Blocks of Very Deep Submicron Self-checking Circuits

An Integrated Approach to Data Path Synthesis for Behavioral-level Power Optimization

3D Simulations of Ultra-small MOSFETs with Real-space Treatment of the Electron – Electron and Electron-ion Interactions

The Chapman-Enskog Expansion and the Quantum Hydrodynamic Model for Semiconductor Devices

Graphical Design Techniques for Fixed-point Multiplication