VLSI Design

Decomposition in VLSI Design


Status
Published

Guest Editors
Lech Jóźwiak

Decomposition in VLSI Design

Articles

  • Special Issue
  • - Volume 3
  • - Article ID 016259

General Decomposition and Its Use in Digital Circuit Synthesis

Lech Jóźwiak
  • Special Issue
  • - Volume 3
  • - Article ID 062636

FSM Decomposition and Functional Verification of FSM Networks

Zafar Hasan | Maciej J. Ciesielski
  • Special Issue
  • - Volume 3
  • - Article ID 028167

PARTIF: Interactive System-level Partitioning

Tarek Ben Ismail | Kevin O'Brien | Ahmed Jerraya
  • Special Issue
  • - Volume 3
  • - Article ID 019823

Division-Based Versus General Decomposition- Based Multiple-Level Logic Synthesis

Frank Volf | Lech Jóźwiak | Mario Stevens
  • Special Issue
  • - Volume 3
  • - Article ID 031829

Decomposition and Reduction: General Problem-Solving Paradigms

Michal Servít | Jan Zamazal
  • Special Issue
  • - Volume 3
  • - Article ID 058962

Guest Editor's Introduction

Lech Jóźwiak
  • Special Issue
  • - Volume 3
  • - Article ID 074543

Decomposition of Sequential Behavior Using Interface Specification and Complementation

Kamlesh Rath | Venkatesh Choppella | Steven D. Johnson
  • Special Issue
  • - Volume 3
  • - Article ID 070871

A New Design Methodology for Two-Dimensional Logic Arrays

Ning Song | Marek A. Perkowski | ... | Andisheh Sarabi
  • Special Issue
  • - Volume 3
  • - Article ID 067208

A General Approach to Boolean Function Decomposition and its Application in FPGABased Synthesis

Tadeusz Łuba | Henry Selvaraj
  • Special Issue
  • - Volume 3
  • - Article ID 024594

Multi-Level Logic Synthesis Based on Kronecker Decision Diagrams and Boolean Ternary Decision Diagrams for Incompletely Specified Functions

Marek A. Perkowski | Malgorzata Chrzanowska-Jeske | ... | Ingo Schäfer