VLSI Design

Low Power Architecture and Circuit Design Computer Aided Design


Status
Published

Guest Editors
Jun-Dong Cho

Low Power Architecture and Circuit Design Computer Aided Design

Articles

  • Special Issue
  • - Volume 12
  • - Article ID 067893

Low Power Built-In Self-Test Schemes for Array and Booth Multipliers

D. Bakalist | X. Kavousianos | ... | G. Ph. Alexiou
  • Special Issue
  • - Volume 12
  • - Article ID 059548

On Mixed PTL/Static Logic for Low-power and High-speed Circuits

Geun Rae Cho | Tom Chen
  • Special Issue
  • - Volume 12
  • - Article ID 016935

A Low-Voltage Floating-Gate MOS Biquad

Esther O. Rodríguez-Villegas | Alberto Yúfera | Adoración Rueda
  • Special Issue
  • - Volume 12
  • - Article ID 047640

CADRE: A Low-power, Low-EMI DSP Architecture for Digital Mobile Phones

Mike Lewis | Linda Brackenbury
  • Special Issue
  • - Volume 12
  • - Article ID 051413

A Novel Low-power Shared Division and Square-root Architecture Using the GST Algorithm

Martin Kuhlmann | Keshab K. Parhi
  • Special Issue
  • - Volume 12
  • - Article ID 054974

A Low Power FIR Filter Design for Image Processing

Jun Mo Jung | Jong-Wha Chong
  • Special Issue
  • - Volume 12
  • - Article ID 090464

Low Power Design for ASIC Cores

Alvar Dean | David Garrett | ... | Sebastian Ventrone
  • Special Issue
  • - Volume 12
  • - Article ID 094037

Exploiting Data-dependencies in Ultra Low-power DSP Arithmetic

V. A. Bartlett | E. Grass
  • Special Issue
  • - Volume 12
  • - Article ID 085792

Preface

Jun-Dong Cho
  • Special Issue
  • - Volume 12
  • - Article ID 025179

Simultaneous Switching Noise Minimization Technique Using Dual Layer Power Line Mutual Inductors

Yongha Lee | Jongho Choi | ... | Jeomkeun Kim

Article of the Year Award: Outstanding research contributions of 2020, as selected by our Chief Editors. Read the winning articles.