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Optical Networks-on-Chip

Call for Papers

In recent decades, there has been an industry shift from increasing processor clock rates towards increasing core counts. In terms of multiprocessor systems-on-chip (MPSoCs), with the increase in the number of integrated processing cores on a single die, processor data rate will quickly reach several tens of GHz, which results in larger bandwidth requirement, higher intra/interchip transmission time, and higher power consumption. The International Technology Roadmap for Semiconductors predicts that interconnects will become the most critical solution to these challenges in the near future. Optical networks-on-chip (ONoCs), scalable and efficient on-chip interconnects, are promising and appealing to meet the demands of future many-core processors by providing high-bandwidth and low power communication over extended distances. ONoCs are based on photonic technology and use silicon-based optical interconnects and optical routers, which are compatible with CMOS technology. Compared with traditional electronic NoCs, ONoCs can potentially capitalize on the unique advantages of optical communication and thus achieve significantly higher bandwidth, lower power dissipation, and lower latency.

However, ONoCs are still in their infancy, needing deep theoretical investigation of modeling and optimizing network performance. Also, emerging network structures, router structures, and routing protocols that can be adopted by ONoCs and implementation challenges therein need further exploration. The objective of this call is to bring recent progress in ONoCs studying that may help put together a clear picture for this new area.

Potential topics include but are not limited to the following:

  • Crosstalk noise analysis of ONoCs with different network topologies
  • The floorplan optimization of ONoCs
  • Proposing high-performance laser source, optical switching, and optical detector
  • Optimizing basic photonic elements used in ONoCs
  • Designing new network structures that can improve the NoCs performance
  • Proposing new routers and corresponding routing protocols
  • Thermal noise analysis in ONoCs
  • The performance investigation of ONoCs with WDM
  • Power loss analysis of ONoCs
  • The optical buffer studying
  • Wavelength allocation mechanism exploration in ONoCs
  • Power saving techniques researching in ONoCs
  • Throughput and time delay exploration for ONoCs using network simulation platform
  • Applying different traffic pattern and application to performance analysis of ONoCs
  • Combining coding technology to decrease BER of ONoCs

Authors can submit their manuscripts through the Manuscript Tracking System at

Submission DeadlineFriday, 26 January 2018
Publication DateJune 2018

Papers are published upon acceptance, regardless of the Special Issue publication date.

Lead Guest Editor

  • Yiyuan Xie, Southwest University, Chongqing, China

Guest Editors

  • Yaoyao Ye, Shanghai Jiao Tong University, Shanghai, China
  • Gaofeng Pan, Southwest University, Chongqing, China
  • Kang Li, University of South Wales, Pontypridd, UK