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Next Generation Low Power VLSI Interconnects and Emerging Technologies

Call for Papers

The ever increasing need for miniaturization, performance, and multifunctional microelectronic devices is motivating the microelectronic industry to move towards higher integration density. In such scenario, the VLSI interconnects and vias are required to provide high data bandwidth with reliable signal integrity. To provide a solution to these increasing demands, silicon interposers with high density through silicon via (TSV) have emerged. The interposers provide shorter interconnections between chip and substrate, hence improving the electrical performance of the system by lesser power dissipation and propagation delay.

The special issue primarily focuses on the state-of-the-art research papers in the area of the next generation low power VLSI interconnects, through-silicon vias, organic and nanomaterial based low-power circuit designing, simulation, and testing. Its scope also includes review articles that address recent technical trends and future scope of low-power VLSI devices and circuit applications. The special issue provides a dynamic high-quality international forum for original papers and tutorials by academic, industrial, and other scholarly contributors in low-power VLSI devices and circuits.

Potential topics include but are not limited to the following:

  • Graphene based VLSI interconnects and through silicon vias
  • Graphene based optical interconnects
  • Solar-cell and MEMS/NEMS
  • Modeling and Designing of FinFET and Tunnel FET based devices
  • Double Gate (DG) MOSFETs and Hetero structures
  • Modeling of Junctionless FET and Si-Nanowire FET
  • Modeling of Organic Thin Film Transistors (OTFT) and OLED structures

Authors can submit their manuscripts through the Manuscript Tracking System at

Submission DeadlineFriday, 30 March 2018
Publication DateAugust 2018

Papers are published upon acceptance, regardless of the Special Issue publication date.

Lead Guest Editor

  • Manoj k. Majumdar, International Institute of Information Technology, Naya Raipur, India

Guest Editors