Wireless Communications and Mobile Computing

Volume 2017 (2017), Article ID 3926821, 12 pages

https://doi.org/10.1155/2017/3926821

## Pipeline Implementation of Polyphase PSO for Adaptive Beamforming Algorithm

School of Electronic Science and Engineering, National University of Defense Technology, Changsha, China

Correspondence should be addressed to Li Yu

Received 14 March 2017; Accepted 13 September 2017; Published 19 December 2017

Academic Editor: Haiyu Huang

Copyright © 2017 Shaobing Huang et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

Adaptive beamforming is a powerful technique for anti-interference, where searching and tracking optimal solutions are a great challenge. In this paper, a partial Particle Swarm Optimization (PSO) algorithm is proposed to track the optimal solution of an adaptive beamformer due to its great global searching character. Also, due to its naturally parallel searching capabilities, a novel Field Programmable Gate Arrays (FPGA) pipeline architecture using polyphase filter bank structure is designed. In order to perform computations with large dynamic range and high precision, the proposed implementation algorithm uses an efficient user-defined floating-point arithmetic. In addition, a polyphase architecture is proposed to achieve full pipeline implementation. In the case of PSO with large population, the polyphase architecture can significantly save hardware resources while achieving high performance. Finally, the simulation results are presented by cosimulation with ModelSim and SIMULINK.

#### 1. Introduction

Potential interference has been the major concern for system designers in military and critical civilian wireless communication since it may obscure the original received signal. As we all know, the traditional filters process signals in frequency domain, which are usually incapable of interference cancellation in cases when the interference signals occupy the same frequency band as the desired signal. In this case, if we attempt to suppress high-power interferences, the low-power signals of interest will be eliminated. Adaptive beamforming [1], known as a spatial filtering method, has been a powerful technique to enhance signals of interest while suppressing the interference and the noise signal as a result of the linear combination of the array antenna. Most of the adaptive beamforming algorithms, according to whether the training sequence is used or not, could be divided into two classes [2]: blind adaptive algorithm and nonblind adaptive algorithm. And, in our research, the nonblind algorithms are employed.

LMS [3] approaches may have been the most widely used nonblind adaptive beamforming algorithm in engineering applications due to its robustness and simplicity. However, it exhibits a slow convergence and easily tracks into local optimal solution, which would be a fatal flaw when the digital wireless communication system has a high-performance requirement of real-time implementation.

Particle Swarm Optimization (PSO), which was proposed by Professors Eberhart and Kennedy in 1995 [4], is now one of the most important and widely used swarm intelligence algorithms. Using some simple principles, the PSO algorithms mimic the behavior of birds flocking to guide the swarm particles to search for global optimal solution. Compared to other evolutionary algorithms such as the genetic algorithms [5], simulated annealing algorithms [6], ant colony algorithms [7], and others, the PSO algorithms is much easier to implement and shows great performance in convergence speed and in searching global optimal solutions. Therefore, it has been successfully used in many engineering applications in recent years, including adaptive filters, which can be regarded as real-world optimization problems [8–13].

Similar to other iterative evolutionary computation approaches, the PSO algorithm is also a population-based optimization technique, the main drawback of which is long execution times, specifically when solving large scale complex engineering problems. Therefore, with the advantage of naturally parallel searching capabilities, parallel implementation of the PSO algorithms has been proposed to overcome the problems mentioned above, achieving high performance in comparison with software solutions [14–17]. However, the PSO algorithm’s hardware cost will increase rapidly when its population enlarges, since every increase in swarm size will result in a linear increase in the consumption of hardware resources. This weakness has restricted the use of the PSO algorithm in wide applications of digital signal processing methods.

Recently, advances in Very Large Scale Integration (VLSI) technology have seen significant interest in using Field Programmable Gate Array (FPGA) to speed up scientific and engineering computation with its parallel implementation and configurable hardware technology [18–20]. Taking advantage of powerful designed architecture, such as pipelining and parallel computing, FPGA could achieve much greater processing speed than common software solutions.

FPGA implementation of the PSO algorithm is a feasible and cheap solution because of its parallel high-performance computing and configurable character. Several different parallel architectures have been proposed to implement the PSO algorithm. Most of the previous work dealing with the implementation of the PSO algorithms based on FPGA uses fixed-point arithmetic since the conventional FPGA technology just provides integer and fixed-point arithmetic [21–25]. This approach could reduce the hardware cost in the logic area; however, the simplification is likely to result in resolution degradation because of its small dynamic range. A simple implementation of adaptive filters with the PSO algorithm based on FPGA has been presented in literature [23]. In the anti-interference communication field, especially in military wireless communication, the narrow interference signal’s power is usually more than 30 dB higher than the signal of interest which requires a large dynamic range; namely, the algorithm operates over small and large numbers during the PSO execution. In addition, the iterative PSO algorithm needs high precision to offset the effect of update error. Obviously, fixed-point arithmetic could not satisfy these two requirements. Hence, we propose the adaptive beamforming algorithm with PSO using the user-defined floating-point arithmetic which would reduce the loss of precision while decreasing the consumption of hardware resources as much as possible. Although few previous works [18, 26] have implemented the PSO based on floating-point arithmetic, they are still presented using common parallel architectures in which each particle has to use independent hardware units to achieve signal processing. This results in a large consumption of hardware resources and power, which is an adverse issue for digital communication systems.

In this paper, we present a novel pipelined architecture based on FPGA to implement an adaptive beamforming algorithm using PSO based on the minimum mean square error (MSE) criterion. The proposed architecture is based on user-defined floating-point arithmetic [8]. This implementation architecture mainly applies to modern digital anti-interference communication systems in which the baseband chip cycle is much greater than the system clock period. As a consequence, a large time redundancy is generated, of which full use could be made. Essentially, this novel architecture reuses hardware resources meaning that all particles share the same hardware units to evaluate fitness and update position. This hardly makes any difference in achieving high performance of the system because of the large fixed time redundancy. Using digital polyphase filtering signal processing technology could save a large amount of hardware resources and power consumption since essentially only one hardware processing unit is needed for one particle. In addition, the existing floating-point arithmetic on FPGA designed by XILINX executes a formatting operation after finishing every addition or multiplication operation which would no doubt increase the consumption of resources. Further, the existing floating-point arithmetic uses the IEEE-754 standard, which may not be enough to achieve large dynamic range and high precision. For the two reasons given above, the implementations of adaptive beamforming with the PSO algorithm are based on suitable user-defined floating-point arithmetic.

The remainder of this paper is organized as follows. The model of adaptive beamforming and the PSO algorithm is presented in Section 2. Section 3 describes the related operations covering FPGA implementation of adaptive beamforming with the PSO algorithm. Section 4 provides the entire proposed implementation architectures. The simulation methods and results are given in Section 5. Finally, we present our conclusions in Section 6.

#### 2. Adaptive Beamforming

In a real digital anti-interference communication system, an adaptive beamformer only processes baseband signals rather than the RF (Radio Frequency) signals or IF (Intermediate Frequency) signals. Figure 1 shows the entire simplified adaptive beamforming system based on the Uniform Linear Array (ULA) with isotropic antennas. The output of the ULA is given by [10] where denotes the signal of interest with the Direction of Arrival (DOA) and denotes the interference signals with the DOA . and denote the steering vectors for the signal of interest and interfering signals, respectively. is the additive white Gaussian noise (AWGN). The RF signals from the ULA will be mixed with the LOF (Local Oscillator Frequency) by the local oscillator and then output the specified IF signals. Signal is the output of the AD converter, as the input signal for the Digital Downconverter (DDC). The main role of DDC is to transform the IF discrete signals down to the complex baseband signal (where ), which is the input signal for the adaptive beamformer.