Figure 1: Schematic of the process flow of bFDSOI-FETs. (a) Si body patterning. (b-1) Block-oxide formation, where the height of the block-oxide () is equal to the Si body thickness () and the length of the block-oxide () is 60 nm for thin S/D bFDSOI-FET. (b-2) Block-oxide formation, where the is equal to the and the is 15 nm for recessed S/D bFDSOI-FET. (c-1) Poly-Si deposition. (c-2) Poly-Si deposition, planarization, and deposition again. (d) A thin S/D bFDSOI-FET. (e) A recessed bFDSOI-FET. (f) An FDSOI-FET. (g) A UTBSOI-FET. (h) An E-S/D UTBSOI-FET. For thin S/D and recessed S/D bFDSOI-FETs, typical values of and poly-Si channel thickness () are 30 nm and 5 nm, respectively. For FDSOI-FET, the typical value of is 30 nm. For UTBSOI-FET, the typical value of (= ) is 5 nm. For E-S/D UTBSOI-FET, typical values of (= ) and poly-Si raised S/D thickness are 5 nm and 30 nm, respectively. For other parameters, BOX thickness () and front-gate oxide thickness () are 50 nm and 1.4 nm, respectively.