Research Article
An Inductorless Cascaded Phase-Locked Loop with Pulse Injection Locking Technique in 90 nm CMOS
Table 3
Performance summary at
GHz.
| This work | MPLL VCO | MPLL | CPLL |
| [GHz] | 7.2 | [MHz] |
— | 300 | 50 | [MHz] | 300 | 300 | 200 | 1600 | | 24 | 24 | 36 | 4.5 | [dBc/Hz] | | | | | Power consumption [mW] | 8.4 | 14 | 25 | Area [mm2] | 0.0014 | 0.080 | 0.11 |
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